XRT8001 Datasheet, PDF (3/48 Pages) Exar Corporation – WAN Clock for T1 and E1 Systems

XRT8001
SDO 1
SYNC 2
FIN 3
GND 4
GND 5
CLK1 6
VCC 7
MSB 8
GND 9
XRT8001
18 SCLK
17 CS
16 SDI
15 VCC
14 GND
13 CLK2
12 VCC
11 LOCKDET
10 VCC
Figure 3. XRT8001 PIN OUT
PIN DESCRIPTION
Pin #
1
Name
SDO
2
SYNC
3
FIN
4
GND
5
GND
6
CLK1
7
V_CC
Rev. 1.01
Type
O
O
I
-
-
O
-
Description
Serial Data Output from the Microprocessor Serial Interface
This pin will serially output the contents of the specified Command
Register, during “Read” Operations. The data, on this pin, will be
updated on the falling edge of the SCLK input signal. This pin will be tri-
stated upon completion of data transfer.
Sync Output - The XRT8001 will typically output an 8kHz clock signal
via this output pin.
However, when the XRT8001 is operating in the “High Speed - Reverse”
Mode, then this device will simply output a 64kHz clock signal.
Reference Clock Input - The Reference Timing signal (from which the
CLK1 and CLK2 output signals are derived) is to be input via this pin.
Digital Ground
Digital Ground
Clock Output 1 - The XRT8001 will drive the desired “synthesized”
signal via this output pin. This output signal will have a 50+5% duty
cycle.
Note: This output pin is tri-stated unless the “CLK1EN” bit-field (within
Command Register CR4) has been set to “1”.
Digital Power Supply
3