XRT8001 Datasheet, PDF (40/48 Pages) Exar Corporation – WAN Clock for T1 and E1 Systems

XRT8001
In this case, the user must set the “E1/T1* SELECT”
signal to “HIGH”, order to select “E1 rates” (2.048MHz).
By doing this, the 2.048MHz clock signal (from the T1/
E1 LIU) is selected and will be applied to the “FIN” input
of the XRT8001, and the XRT8001 will configured to
operate in the “Master” Mode.
At this point, the user will need to execute the appro-
priate steps in order to configure the XRT8001 into the
“E1 to T1 Forward/Master” Mode.
9.1 Hardware and Software Implementation Details
Figure x presents a simple block diagram of a design
that can accept either a 1.544MHz or a 2.048MHz
clock signal, and synthesize a 1.544MHz clock signal.
Now we need to provide some details. Hence, Figure
24 presents a circuit schematic which realizes the
function, depicted in Figure 23.
1.544MHz or 2.048MHz
+5V
1.544MHz or 2.048MHz
U3
15
1
10
A
B
9
C
D
QA
QB
3
2
6
QC
QD
7
5
4
UP
CO
12
13
11
14
DN
LOAD
BO
CLR
74AHCT193
U4
15
1
10
A
B
9C
D
QA
QB
3
2
6
QC ₇
QD
5
12
4
11
UP
DN
CO
BO
13
14
LOAD
CLR
74AHCT193
Load-in-64
Divide-by-193
U5A
74AHCT04
U2
2
3
5
6
1A
1B
2A
11
10
14
2B
3A
3B
13
4A
4B
1
15 ^A/B
G
1Y ^{4 8kHz or 2.048MHz}
2Y ⁷
3Y ⁹
12
4Y
74AHCT157
8001_SCLK
8001_SDO
8001_SDI
8001_CS
E1/T1* SELECT
U1
3 _FIN
18
1 ^SCLK
16
17
SDO
SDI
CS
8 _MSB
CLK1 ⁶
CLK2 ¹³
11
LOCKDET
XRT8001
1.544MHz
1.544MHz
LOCK_DET
E1/T1* SELECT
Figure 24: Hardware Design Implementation of Figure 23.
Next, we describe how to configure the circuitry in
Figure 24 to accept a 2.048MHz clock signal, and
configure it to synthesize a 1.544MHz clock signal by
executing five steps. We also describe how to accept
a 1.544MHz clock signal and configure it to synthesize
a 1.544MHz clock.
9.2 Configuring the Circuitry in Figure 6 to accept
a 2.048MHz clock in order to synthesize a 1.544MHz
output clock.
STEP 1 – Drive the “E1/T1* SELECT” input pin to
“HIGH”. This step configures the “2:1 MUX” to select
and apply the 2.048MHz clock to the “FIN” input of the
XRT8001 WAN Clock, as well as configuring the
Rev. 1.01
XRT8001 WAN Clock into the “Master Mode”.
NOTE: The next steps are devoted to configuring the
XRT8001 WAN Clock into the “E1 to T1 Forward/Master”
Mode.
STEP 2 – Write the binary value “1000” into Command
Register CR0 (within the XRT8001 WAN Clock) as
indicated below.
Command Register, CR0 (Address = 0x00)
D4
D3
D2
D1
D0
IOC4 IOC3
IOC2 IOC1 PL1EN
1
0
0
0
1
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