XRT8001 Datasheet, PDF (25/48 Pages) Exar Corporation – WAN Clock for T1 and E1 Systems

XRT8001
P x 56kHz
or
P x 64kHz
Where: 1 < P < 32
FIN
CLK1
XRXRTT88000011
WAWNANCClloocckk
CLK2
1.544MHz
or
2.048MHz
1.544MHz
or
2.048MHz
Figure 15. Illustration of the XRT8001 WAN Clock
Operating in the “Fractional T1/E1 Reverse/Master” Mode
6.3 Configuring the XRT8001 WAN Clock into the
“Fractional T1/E1 Reverse/Master” Mode
The user can configure the XRT8001 WAN Clock to
operate in the “Fractional T1/E1 Reverse/Master”
Mode by executing the following steps.
Step 1 – Configure the XRT8001 to operate in the
“MASTER” Mode, by pulling the “MSB” input pin (pin 8)
to VDD.
Step 2 – Review Table 6, and determine which combi-
nation of “Input Frequency” and “Output Frequencies”
(via PLL1 and PLL2) correlate with the desired configu-
ration.
Input
Frequency
P x 56kHz
P x 56kHz
P x 64kHz
P x 64kHz
PLL1 Output
Frequency
1.544MHz
1.544MHz
2.048MHz
2.048MHz
PLL2 Output
Frequency
2.048MHz
1.544MHz
1.544MHz
2.048MHz
Value to Write to
D4 – D1 in CR0
1001
1010
1011
1100
Table 6. Listing of “Input Frequency” and “Output Frequency” Cases for “Fractional T1/E1 Reverse/
Master” Mode Operation
Rev. 1.01
25