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XRT8001 Datasheet, PDF (22/48 Pages) Exar Corporation – WAN Clock for T1 and E1 Systems | |||
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XRT8001
Step 3 â Upon reviewing Table 4, write the listed value
(under the âValue to Write to D4 â D1 in CR0â Register
Column) into the D4 through D1 bit-fields within Com-
mand Register CR0, as illustrated below.
Command Register CR0 (Address = 0x00)
D4
D3
D2
D1
D0
IOC4
IOC3
IOC2
IOC1
PL1EN
Value to Write to D4 â D1 in CR0
X
Note: If the user wishes to output a clock signal via the
CLK1 output signal, then he/she should also write a â1â into
the âPL1ENâ bit-field within Command Register CR0.
This step configures the XRT8001 to operate in the
âForward/Masterâ Mode.
Step 4 â Next, you need to specify the value for âNâ
(e.g., as in the âN x 1.544MHzâ or âN x 2.048MHzâ clock
signal which is to be applied to the âFINâ input pin.)
In order to specify the value for âNâ, one needs to write
the value of âN - 1â (in binary format) into the âD4 through
D1â bits within Command Register CR1, as illustrated
below.
Command Register, CR1 (Address = 0x01)
D4
D3
D2
D1
D0
M4
M3
M2
M1
PL2EN
Value of âN - 1â (in Binary Format)
X
For example, if the user wishes to configure the
XRT8001 to accept a 1.544MHz clock signal, via the
âFINâ input pin (e.g., N = 1), then the user should write
in the value â0â, into Command Register CR1.
Note: If the user wishes to output a clock signal via the
CLK2 output signal, then he/she should also write a â1â into
the âPL2ENâ bit-field within Command Register CR1.
Step 5 â Specify the value of âKâ (e.g., as in the âK x
56kHzâ or âK x 64kHzâ clock signal which is to be output
via the CLK1 output signal).
In order to specify the value for âKâ, one needs to write
the value of âK - 1â (in binary format) into Command
Register CR2, as illustrated below.
Command Register, CR2 (Address = 0x02)
D4
D3
D2
D1
D0
SEL14 SEL13 SEL12 SEL11 SEL10
Value of âK - 1â (in Binary Format).
For example, if one wishes to configure the XRT8001
to output a clock signal of either â56kHzâ or â64kHzâ
(e.g., where âKâ = 1) via the CLK1 output pin, then he/
she should write the value â0â, into Command Register
CR2.
Step 6 â Specify the value of âKâ (e.g., as in the âK x
56kHzâ or âK x 64kHzâ clock signal which is to be output
via the CLK2 output signal).
In order to specify the value for âKâ, one needs to write
the value of âK - 1â (binary format) into Command
Register CR3, as illustrated below.
Command Register, CR3 (Address = 0x03)
D4
D3
D2
D1
D0
SEL24 SEL23 SEL22 SEL21 SEL20
Value of âK - 1â (in Binary Format).
For example, if one wishes to configure the XRT8001
to output a clock signal of either â1.792MHzâ or
â2.048MHzâ (e.g., where âKâ = 32) via the CLK2 output
pin, then he/she should write the value â31â (or â1 1 1
1 1â in binary format) into Command Register CR3.
Step 7 â Enable any of the following output signals as
appropriate: âSYNCâ, âCLK1â, âCLK2â and
âLOCKDETâ.
This is accomplished by writing a â1â into the corre-
sponding bit-fields, within Command Register CR4, as
illustrated below.
Command Register CR4, (Address = 0x04)
D4
D3
D2
D1
D0
SYNCEN CLK1EN CLK2EN LDETDIS2 LDETDIS1
1
1
1
0
0
Note: For information on the âLDETDIS1â and âLDETDIS2â
bit-fields, please see Table 3.
Rev. 1.01
22
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