XRT83L314 Datasheet, PDF (75/84 Pages) Exar Corporation – 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT

XRT83L314
14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.0
BIT
NAME
GLOBAL REGISTER (0XE9H)
FUNCTION
Register
Type
Default
Value
(HW reset)
D5
ALLT1/E1 T1/E1 Control
R/W
0
This bit is used to reduce system noise and power consumption. If
the ALL T1/E1 mode is enabled, all output clock references
(excluding the 8kHzout in E1 mode only) are internally shut off. By
default, the ALL T1/E1 mode is enabled.
0 = Enabled (reduce clock switching and power consumption)
1 = Disabled (all clock references are available)
D4
TCLKCNL Transmit Clock Control
R/W
0
This bit is used to select the transmit output activity at TTIP/TRING
when TCLK is either pulled "Low", pulled "High", or missing.
0 = Transmit All Zeros
1 = TAOS (Transmit All Ones)
D3
CLKSEL3 Clock Input Select
R/W
0
D2
CLKSEL2 CLKSEL[3:0] is used to select the input clock source used as the
0
D1
CLKSEL1 ^{internal timing reference.}
0
D0
CLKSEL0 ^{0000 = 2.048 MHz}
0
0001 = 1.544 MHz
0010 = 8 kHz
0011 = 16 kHz
0100 = 56 kHz
0101 = 64 kHz
0110 = 128 kHz
0111 = 256 kHz
1000 = 4.096 Mhz
1001 = 3.088 Mhz
1010 = 8.192 Mhz
1011 = 6.176 Mhz
1100 = 16.384 Mhz
1101 = 12.352 Mhz
1110 = 2.048 Mhz
1111 = 1.544 Mhz
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