XRT83L314 Datasheet, PDF (54/84 Pages) Exar Corporation – 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT

XRT83L314
14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.0
REGISTER
NUMBER
0 - 15
16 - 31
32 - 47
48 - 63
64 - 79
80 - 95
96 - 111
112 - 127
128 - 143
144 - 159
160 - 175
176 - 191
192 - 207
208 - 223
224 - 227
228 - 243
244
245 - 253
254
255
TABLE 21: MICROPROCESSOR REGISTER ADDRESS (ADDR[7:0])
ADDRESS (HEX)
FUNCTION
0x00 - 0x0F Channel 0 Control Registers
0x10 - 0x1F Channel 1 Control Registers
0x20 - 0x2F Channel 2 Control Registers
0x30 - 0x3F Channel 3 Control Registers
0x40 - 0x4F Channel 4 Control Registers
0x50 - 0x5F Channel 5 Control Registers
0x60 - 0x6F Channel 6 Control Registers
0x70 - 0x7F Channel 7 Control Registers
0x80 - 0x8F Channel 8 Control Registers
0x90 - 0x9F Channel 9 Control Registers
0xA0 - 0xAF Channel 10 Control Registers
0xB0 - 0xBF Channel 11 Control Registers
0xC0 - 0xCF Channel 12 Control Registers
0xD0 - 0xDF Channel 13 Control Registers
0xE0 - 0xEB Global Control Registers Applied to All 14 Channels
0xEC - 0xF3 R/W Registers Reserved for Testing
0xF4
E1 Arbitrary Select
0xF5 - 0xFD R/W Registers Reserved for Testing
0xFE
Device "ID"
0xFF
Device "Revision ID"
TABLE 22: MICROPROCESSOR REGISTER CHANNEL DESCRIPTION
REG ADDR TYPE
D7
D6
D5
D4
D3
D2
Channel 0 Control Registers (0x00 - 0x0F)
0
0x00 R/W QRSS/PRBS Reserved
RxON
EQC4
EQC3
EQC2
1
0x01 R/W RxTSEL
TxTSEL
TERSEL1
TERSEL0
RxJASEL
TxJASEL
2
0x02 R/W INVQRSS
TxTEST2
TxTEST1
TxTEST0
TxON
LOOP2
3
0x03 R/W NLCDE1
NLCDE0
CODES
RxRES1
RxRES0
INSBPV
4
0x04 R/W EQFLAGE
DMOIE
FLSIE
LCV/OFIE
NLCDIE
AISDIE
5
0x05 RO EQFLAG
DMO
FLS
LCV/OF
NLCD
AIS
6
0x06 RUR EQFLAGS
DMOIS
FLSIS
LCV/OFIS
NLCDIS
AISIS
D1
EQC1
JABW
LOOP1
INSBER
RLOSIE
RLOS
RLOSIS
D0
EQC0
FIFOS
LOOP0
Reserved
QRPDIE
QRPD
QRPDIS
50