XRT83L314 Datasheet, PDF (6/84 Pages) Exar Corporation – 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT

XRT83L314
14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.0
FIGURE 40. SIMPLIFIED BLOCK DIAGRAM OF A NON-INTRUSIVE MONITORING APPLICATION ..................................................................... 41
5.0 MICROPROCESSOR INTERFACE BLOCK ........................................................................................42
TABLE 14: SELECTING THE MICROPROCESSOR INTERFACE MODE .......................................................................................................... 42
FIGURE 41. SIMPLIFIED BLOCK DIAGRAM OF THE MICROPROCESSOR INTERFACE BLOCK ........................................................................ 42
5.1 THE MICROPROCESSOR INTERFACE BLOCK SIGNALS ......................................................................... 43
TABLE 15: XRT84L314 MICROPROCESSOR INTERFACE SIGNALS THAT EXHIBIT CONSTANT ROLES IN BOTH INTEL AND MOTOROLA MODES43
TABLE 16: INTEL MODE: MICROPROCESSOR INTERFACE SIGNALS........................................................................................................... 43
TABLE 17: MOTOROLA MODE: MICROPROCESSOR INTERFACE SIGNALS ................................................................................................. 44
5.2 INTEL MODE PROGRAMMED I/O ACCESS (ASYNCHRONOUS) ............................................................... 45
FIGURE 42. INTEL µP INTERFACE SIGNALS DURING PROGRAMMED I/O READ AND WRITE OPERATIONS .................................................. 46
TABLE 18: INTEL MICROPROCESSOR INTERFACE TIMING SPECIFICATIONS .............................................................................................. 46
5.3 MOTOROLA MODE PROGRAMMED I/O ACCESS (SYNCHRONOUS) ....................................................... 47
FIGURE 43. MOTOROLA µP INTERFACE SIGNALS DURING PROGRAMMED I/O READ AND WRITE OPERATIONS.......................................... 48
TABLE 19: INTEL MICROPROCESSOR INTERFACE TIMING SPECIFICATIONS .............................................................................................. 48
FIGURE 44. MOTOROLA 68K µP INTERFACE SIGNALS DURING PROGRAMMED I/O READ AND WRITE OPERATIONS .................................. 49
TABLE 20: MOTOROLA 68K MICROPROCESSOR INTERFACE TIMING SPECIFICATIONS .............................................................................. 49
TABLE 21: MICROPROCESSOR REGISTER ADDRESS (ADDR[7:0]) .......................................................................................................... 50
TABLE 22: MICROPROCESSOR REGISTER CHANNEL DESCRIPTION.......................................................................................................... 50
TABLE 23: MICROPROCESSOR REGISTER GLOBAL DESCRIPTION............................................................................................................ 51
TABLE 24: MICROPROCESSOR REGISTER 0X00H BIT DESCRIPTION ........................................................................................................ 52
TABLE 25: EQUALIZER CONTROL AND TRANSMIT LINE BUILD OUT.......................................................................................................... 52
TABLE 26: MICROPROCESSOR REGISTER 0X01H BIT DESCRIPTION ........................................................................................................ 54
TABLE 27: MICROPROCESSOR REGISTER 0X02H BIT DESCRIPTION ........................................................................................................ 55
TABLE 28: MICROPROCESSOR REGISTER 0X03H BIT DESCRIPTION ........................................................................................................ 56
TABLE 29: MICROPROCESSOR REGISTER 0X04H BIT DESCRIPTION ........................................................................................................ 57
TABLE 30: MICROPROCESSOR REGISTER 0X05H BIT DESCRIPTION ........................................................................................................ 58
TABLE 31: MICROPROCESSOR REGISTER 0X06H BIT DESCRIPTION ........................................................................................................ 59
TABLE 32: MICROPROCESSOR REGISTER 0X07H BIT DESCRIPTION ........................................................................................................ 60
TABLE 33: MICROPROCESSOR REGISTER 0X08H BIT DESCRIPTION ........................................................................................................ 61
TABLE 34: MICROPROCESSOR REGISTER 0X09H BIT DESCRIPTION ........................................................................................................ 61
TABLE 35: MICROPROCESSOR REGISTER 0X0AH BIT DESCRIPTION ....................................................................................................... 61
TABLE 36: MICROPROCESSOR REGISTER 0X0BH BIT DESCRIPTION ....................................................................................................... 62
TABLE 37: MICROPROCESSOR REGISTER 0X0CH BIT DESCRIPTION ....................................................................................................... 62
TABLE 38: MICROPROCESSOR REGISTER 0X0DH BIT DESCRIPTION ....................................................................................................... 62
TABLE 39: MICROPROCESSOR REGISTER 0X0EH BIT DESCRIPTION ....................................................................................................... 62
TABLE 40: MICROPROCESSOR REGISTER 0X0FH BIT DESCRIPTION........................................................................................................ 63
TABLE 41: MICROPROCESSOR REGISTER 0XE0H BIT DESCRIPTION ....................................................................................................... 63
TABLE 42: MICROPROCESSOR REGISTER 0XE1H BIT DESCRIPTION ....................................................................................................... 64
TABLE 43: MICROPROCESSOR REGISTER 0XE2H BIT DESCRIPTION ....................................................................................................... 65
TABLE 44: MICROPROCESSOR REGISTER 0XE3H BIT DESCRIPTION ....................................................................................................... 65
TABLE 45: MICROPROCESSOR REGISTER 0XE4H BIT DESCRIPTION ....................................................................................................... 66
TABLE 46: MICROPROCESSOR REGISTER 0XE5H BIT DESCRIPTION ....................................................................................................... 67
TABLE 47: MICROPROCESSOR REGISTER 0XE6H BIT DESCRIPTION ....................................................................................................... 68
TABLE 48: MICROPROCESSOR REGISTER 0XE7H BIT DESCRIPTION ....................................................................................................... 69
TABLE 49: MICROPROCESSOR REGISTER 0XE8H BIT DESCRIPTION ....................................................................................................... 69
CLOCK SELECT REGISTER ....................................................................................................... 70
FIGURE 45. REGISTER 0XE9H SUB REGISTERS ..................................................................................................................................... 70
TABLE 50: MICROPROCESSOR REGISTER 0XE9H BIT DESCRIPTION ....................................................................................................... 70
TABLE 51: MICROPROCESSOR REGISTER 0XEAH BIT DESCRIPTION ....................................................................................................... 72
TABLE 52: MICROPROCESSOR REGISTER 0XEBH BIT DESCRIPTION ....................................................................................................... 72
TABLE 53: E1 ARBITRARY SELECT........................................................................................................................................................ 73
TABLE 54: MICROPROCESSOR REGISTER 0XFEH BIT DESCRIPTION ....................................................................................................... 74
TABLE 55: MICROPROCESSOR REGISTER 0XFFH BIT DESCRIPTION ....................................................................................................... 74
TABLE 56: ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................. 75
TABLE 57: DC DIGITAL INPUT AND OUTPUT ELECTRICAL CHARACTERISTICS........................................................................................... 75
TABLE 58: AC ELECTRICAL CHARACTERISTICS ...................................................................................................................................... 75
TABLE 59: POWER CONSUMPTION ........................................................................................................................................................ 76
TABLE 60: E1 RECEIVER ELECTRICAL CHARACTERISTICS ...................................................................................................................... 76
TABLE 61: T1 RECEIVER ELECTRICAL CHARACTERISTICS ...................................................................................................................... 77
TABLE 62: E1 TRANSMITTER ELECTRICAL CHARACTERISTICS................................................................................................................. 78
TABLE 63: T1 TRANSMITTER ELECTRICAL CHARACTERISTICS................................................................................................................. 78
ORDERING INFORMATION ......................................................................................................... 79
PACKAGE DIMENSIONS (DIE DOWN) ....................................................................................... 79
REVISION HISTORY ...................................................................................................................................................... 80
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