XRT83L314 Datasheet, PDF (25/84 Pages) Exar Corporation – 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT

XRT83L314
14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.0
2.6.2 Interference Margin
The interference margin for the XRT83L314 will be added when the first revision of silicon arrives. The test
configuration for measuring the interference margin is shown in Figure 12.
FIGURE 12. TEST CONFIGURATION FOR MEASURING INTERFERENCE MARGIN
E1 = 1,024kHz
T1 = 772kHz
Sinewave
Generator
E1 = PRBS 2¹⁵ - 1
T1 = PRBS 2²³ - 1
W&G ANT20 _Tx
Network
Analyzer
Rx
Flat Loss
Cable Loss
Rx
External Loopback
XRT83L314
Tx
14-Channel LIU
2.6.3 General Alarm Detection and Interrupt Generation
The receive path detects EQFLAG, RLOS, AIS, QRPD, NCLD, and FLS. These alarms can be individually
masked to prevent the alarm from triggering an interrupt. To enable interrupt generation, the Global Interrupt
Enable (GIE) bit must be set "High" in the appropriate global register. Any time a change in status occurs (it
the alarms are enabled), the interrupt pin will pull "Low" to indicate an alarm has occurred. Once the status
registers have been read, the INT pin will return "High". The status registers are Reset Upon Read (RUR).
The interrupts are categorized in a hierarchical process block. Figure 13 is a simplified block diagram of the
interrupt generation process.
FIGURE 13. INTERRUPT GENERATION PROCESS BLOCK
Global Interrupt
Enable (GIE="1")
Global Channel Interrupt Status
(Indicates Which Channel(s) Experienced a Change in
Status)
Individual Alarm Status Change
(Indicates Which Alarm Experienced a Change)
Individual Alarm Indication
(Indicates the Alarm Condition Active/Inactive)
NOTE: The interrupt pin is an open-drain output that requires a 10kΩ external pull-up resistor.
2.6.3.1 RLOS (Receiver Loss of Signal)
21