XRT83L314 Datasheet, PDF (5/84 Pages) Exar Corporation – 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT

XRT83L314
14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.0
FIGURE 17. DUAL RAIL MODE WITH A FIXED REPEATING "0011" PATTERN ............................................................................................ 25
2.10 RXMUTE (RECEIVER LOS WITH DATA MUTING) ..................................................................................... 25
FIGURE 18. SIMPLIFIED BLOCK DIAGRAM OF THE RXMUTE FUNCTION................................................................................................... 25
3.0 TRANSMIT PATH LINE INTERFACE ................................................................................................. 26
FIGURE 19. SIMPLIFIED BLOCK DIAGRAM OF THE TRANSMIT PATH ......................................................................................................... 26
3.1 TCLK/TPOS/TNEG DIGITAL INPUTS ............................................................................................................ 26
FIGURE 20. TRANSMIT DATA SAMPLED ON FALLING EDGE OF TCLK...................................................................................................... 26
FIGURE 21. TRANSMIT DATA SAMPLED ON RISING EDGE OF TCLK........................................................................................................ 26
3.2 HDB3/B8ZS ENCODER .................................................................................................................................. 27
TABLE 7: TIMING SPECIFICATIONS FOR TCLK/TPOS/TNEG.................................................................................................................. 27
TABLE 8: EXAMPLES OF HDB3 ENCODING ............................................................................................................................................ 27
TABLE 9: EXAMPLES OF B8ZS ENCODING............................................................................................................................................. 27
3.3 TRANSMIT JITTER ATTENUATOR ............................................................................................................... 28
3.4 TAOS (TRANSMIT ALL ONES) ..................................................................................................................... 28
FIGURE 22. TAOS (TRANSMIT ALL ONES) ............................................................................................................................................ 28
3.5 TRANSMIT DIAGNOSTIC FEATURES .......................................................................................................... 28
TABLE 10: MAXIMUM GAP WIDTH FOR MULTIPLEXER/MAPPER APPLICATIONS......................................................................................... 28
3.5.1 ATAOS (AUTOMATIC TRANSMIT ALL ONES)......................................................................................................... 29
FIGURE 23. SIMPLIFIED BLOCK DIAGRAM OF THE ATAOS FUNCTION ..................................................................................................... 29
3.5.2 NETWORK LOOP UP CODE...................................................................................................................................... 29
FIGURE 24. NETWORK LOOP UP CODE GENERATION ............................................................................................................................ 29
3.5.3 NETWORK LOOP DOWN CODE ............................................................................................................................... 29
FIGURE 25. NETWORK LOOP DOWN CODE GENERATION ....................................................................................................................... 29
3.5.4 QRSS GENERATION.................................................................................................................................................. 30
3.6 TRANSMIT PULSE SHAPER AND FILTER ................................................................................................... 30
3.6.1 T1 LONG HAUL LINE BUILD OUT (LBO).................................................................................................................. 30
FIGURE 26. LONG HAUL LINE BUILD OUT WITH -7.5DB ATTENUATION .................................................................................................... 30
TABLE 11: RANDOM BIT SEQUENCE POLYNOMIALS................................................................................................................................ 30
FIGURE 27. LONG HAUL LINE BUILD OUT WITH -15DB ATTENUATION ..................................................................................................... 31
FIGURE 28. LONG HAUL LINE BUILD OUT WITH -22.5DB ATTENUATION .................................................................................................. 31
3.6.2 T1 SHORT HAUL LINE BUILD OUT (LBO) ............................................................................................................... 32
3.6.3 ARBITRARY PULSE GENERATOR FOR T1 AND E1............................................................................................... 32
FIGURE 29. ARBITRARY PULSE SEGMENT ASSIGNMENT ......................................................................................................................... 32
3.7 DMO (DIGITAL MONITOR OUTPUT) ............................................................................................................. 32
TABLE 12: SHORT HAUL LINE BUILD OUT.............................................................................................................................................. 32
3.8 LINE TERMINATION (TTIP/TRING) ............................................................................................................... 33
FIGURE 30. TYPICAL CONNECTION DIAGRAM USING INTERNAL TERMINATION ......................................................................................... 33
4.0 T1/E1 APPLICATIONS ........................................................................................................................ 34
4.1 LOOPBACK DIAGNOSTICS .......................................................................................................................... 34
4.1.1 LOCAL ANALOG LOOPBACK .................................................................................................................................. 34
FIGURE 31. SIMPLIFIED BLOCK DIAGRAM OF LOCAL ANALOG LOOPBACK................................................................................................ 34
4.1.2 REMOTE LOOPBACK ................................................................................................................................................ 34
FIGURE 32. SIMPLIFIED BLOCK DIAGRAM OF REMOTE LOOPBACK .......................................................................................................... 34
4.1.3 DIGITAL LOOPBACK ................................................................................................................................................. 35
FIGURE 33. SIMPLIFIED BLOCK DIAGRAM OF DIGITAL LOOPBACK ........................................................................................................... 35
4.1.4 DUAL LOOPBACK ..................................................................................................................................................... 35
FIGURE 34. SIMPLIFIED BLOCK DIAGRAM OF DUAL LOOPBACK ............................................................................................................... 35
4.2 84-CHANNEL T1/E1 MULTIPLEXER/MAPPER APPLICATIONS ................................................................. 36
FIGURE 35. SIMPLIFIED BLOCK DIAGRAM OF AN 84-CHANNEL APPLICATION ........................................................................................... 36
TABLE 13: CHIP SELECT ASSIGNMENTS ................................................................................................................................................ 36
4.3 LINE CARD REDUNDANCY .......................................................................................................................... 37
4.3.1 1:1 AND 1+1 REDUNDANCY WITHOUT RELAYS .................................................................................................... 37
4.3.2 TRANSMIT INTERFACE WITH 1:1 AND 1+1 REDUNDANCY .................................................................................. 37
FIGURE 36. SIMPLIFIED BLOCK DIAGRAM OF THE TRANSMIT INTERFACE FOR 1:1 AND 1+1 REDUNDANCY ................................................ 37
4.3.3 RECEIVE INTERFACE WITH 1:1 AND 1+1 REDUNDANCY..................................................................................... 37
FIGURE 37. SIMPLIFIED BLOCK DIAGRAM OF THE RECEIVE INTERFACE FOR 1:1 AND 1+1 REDUNDANCY.................................................. 38
4.3.4 N+1 REDUNDANCY USING EXTERNAL RELAYS ................................................................................................... 38
4.3.5 TRANSMIT INTERFACE WITH N+1 REDUNDANCY ................................................................................................ 39
FIGURE 38. SIMPLIFIED BLOCK DIAGRAM OF THE TRANSMIT INTERFACE FOR N+1 REDUNDANCY ............................................................ 39
4.3.6 RECEIVE INTERFACE WITH N+1 REDUNDANCY ................................................................................................... 40
FIGURE 39. SIMPLIFIED BLOCK DIAGRAM OF THE RECEIVE INTERFACE FOR N+1 REDUNDANCY .............................................................. 40
4.4 POWER FAILURE PROTECTION .................................................................................................................. 41
4.5 OVERVOLTAGE AND OVERCURRENT PROTECTION ............................................................................... 41
4.6 NON-INTRUSIVE MONITORING .................................................................................................................... 41
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