XRT75L03D Datasheet, PDF (61/134 Pages) Exar Corporation – THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER

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XRT75L03D
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER REV. 1.0.0
TABLE 15: XRT75L03D REGISTER MAP - QUICK LOOK
ADDRESS
LOCATION
REGISTER NAME
0x17
Jitter Attenuator
Control Register -
Ch 0
BIT 7
BIT 6
Reserved
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
SONET
APS
Recovery
Time Mode
Disable
JA
RESET
JA1
(JA Mode
Select Bit 1)
JA in
TxPath
JA0
(JA Mode
Select 0)
0x19 -
0x1F
Reserved
Reserved
0x20
Block Level
Interrupt Enable
Register - Ch 32
0x21
Block Level
Interrupt Enable
Register - Ch 33
0x22 -
0x3D
Reserved
Reserved
0x3E
Device Part
0
1
1
1
0
0
1
1
Number Register
0x3F
Chip Revision
0
0
0
0
Number Register
Revision Number Value
0x40 -
0xFF
Reserved
Reserved
LEGEND:
Denotes Reserved (or Unused) Register Bits
Denotes Read/Write Bits
Denotes Read-Only Bits
Denotes Reset-Upon-Read Bits
THE REGISTER MAP AND DESCRIPTION FOR THE XRT75L03D 3-CHANNEL DS3/E3/STS-1 LIU IC
TABLE 16: COMMAND REGISTER ADDRESS MAP, WITHIN THE XRT75L03D 3-CHANNEL DS3/E3/STS-1 LIU W/
JITTER ATTENUATOR IC
ADDRESS
0x00
COMMAND REGISTER
CR0
TYPE
R/W
REGISTER NAME
APS/Redundancy Control Register
CHANNEL 0 CONTROL REGISTERS
0x01
CR1
R/O
Source Level Interrupt Enable Register - Channel
0
0x02
CR2
R/W
Source Level Interrupt Status Register Channel 0
0x03
CR3
R/O
Alarm Status Register - Channel 0
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