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XRT75L03D Datasheet, PDF (49/134 Pages) Exar Corporation – THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
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XRT75L03D
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER REV. 1.0.0
4.4 Transmit Drive Monitor:
This feature is used for monitoring the transmit line for occurrence of fault conditions such as a short circuit on
the line or a defective line driver.
To activate this function, connect MTIP_n pins to the TTIP_n lines via a 270 Ω resistor and MRing_n pins to
TRing_n lines via 270 Ω resistor as shown in Figure 16.
FIGURE 16. TRANSMIT DRIVER MONITOR SET-UP.
TTIP(n)
37.4Ω +1%
TxPOS(n)
TxNEG(n)
TxLineClk(n)
TPData(n)
TNData(n)
TxClk(n) TRing(n)
37.4Ω + 1%
MTIP(n)
R4 270Ω
MRing(n)
R5 270Ω
XRT75L03D (0nly one channel shown)
R3
75Ω
1:1
When the MTIP_n and MRing_n are connected to the TTIP_n and TRing_n lines, the drive monitor circuit
monitors the line for transitions. The DMO_n (Drive Monitor Output) will be asserted “Low” as long as the
transitions on the line are detected via MTIP_n and MRing_n.
If no transitions on the line are detected for 128 ± 32 TxClk_n periods, the DMO_n output toggles “High” and
when the transitions are detected again, DMO_n toggles “Low”.
NOTE: The Drive Monitor Circuit is only for diagnostic purpose and does not have to be used to operate the transmitter.
4.5 Transmitter Section On/Off:
The transmitter section of each channel can either be turned on or off. To turn on the transmitter, set the input
pin TxON_n to “High” (in Hardware Mode) or write a “1” to the TxON_n control bits (in Host Mode) and TxON_n
pins tied “High”.
When the transmitter is turned off, TTIP_n and TRing_n are tri-stated.
NOTES:
1. This feature provides support for Redundancy.
2. If the XRT75L03D is configured in Host mode, to permit a system designed for redundancy to quickly shut-off the
defective line card and turn on the back-up line card, writing a “1” to the TxON_n control bits transfers the control
to TxON_n pins.
5.0 THE RECEIVER SECTION:
This section describes the detailed operation of the various blocks in the receiver. The receiver recovers the
TTL/CMOS level data from the incoming bipolar B3ZS or HDB3 encoded input pulses.
5.1 AGC/Equalizer:
The Adaptive Gain Control circuit amplifies the incoming analog signal and compensates for the various flat
losses and also for the loss at one-half symbol rate. The AGC has a dynamic range of 30 dB.
The Equalizer restores the integrity of the signal and compensates for the frequency dependent attenuation of
up to 900 feet of coaxial cable (1300 feet for E3). The Equalizer also boosts the high frequency content of the
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