XRT75L03D Datasheet, PDF (18/134 Pages) Exar Corporation – THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER

XRT75L03D
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REV. 1.0.0 THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
SYSTEM-SIDE RECEIVE OUTPUT AND RECEIVE CONTROL PINS
PIN #
SIGNAL NAME
TYPE
DESCRIPTION
69
RxMON/
SDO
I
Receiver Monitor Mode Enable:
This input pin permits the user to configure each of the three (3) Receive Sec-
tions within the XRT75L03D, into the Receiver Monitor Mode.
If the user configures each of the Receive Sections into the Receive Monitor
Mode, then each of the Receiver Sections will be able to receive a nominal
DSX-3/STSX-1 signal that has been attenuated by 20dB of flat loss along with
6dB of cable loss, in an error-free manner, and without declaring the LOS defect
condition.
"Low" - Configures each of the Receive Sections to operate in the Normal
Mode.
"High" - Configures each of the Receive Sections to operate in the Receive
Monitor Mode.
NOTES:
1. This input pin will function as the SDO (Serial Data Output pin within
the Microprocessor Serial Interface) whenever the XRT75L03D has
been configured to operate in the Host Mode.
2. This configuration setting applies globally to all three (3) of the
channels within the XRT75L03D.
68
RxON/
SDI
I
Receive ON:
This input pin permits the user to either turn on or turn off each of the three (3)
Receive Sections within the XRT75L03D. If the user turns on the Receive Sec-
tions of each channel, then all three channels will begin to receive the incoming
DS3, E3 or STS-1 data-streams via the RTIP_n and RRING_n input pins.
Conversely, if the user turns off the Receive Section, then the entire Receive
Section (e.g., the AGC and Receive Equalizer blocks, Clock Recovery PLL, etc.)
will be powered down.
"Low" - Shuts off the Receive Sections within each of the three (3) Channels in
the XRT75L03D.
"High" - Turns on the Receive Sections within each of the three (3) Channels in
the XRT75L03D.
NOTES:
1. This input pin will function as the SDI (Serial Data Input pin within the
Microprocessor Serial Interface) whenever the XRT75L03D has been
configured to operate in the Host Mode.
2. This configuration setting applies globally to all three (3) of the
channels within the XRT75L03D.
3. This pin is internally pulled low.
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