XRT75L03D Datasheet, PDF (6/134 Pages) Exar Corporation – THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER

XRT75L03D
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REV. 1.0.0 THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
TABLE 26: ALARM STATUS REGISTER - CHANNEL 0 ADDRESS LOCATION = 0X03 ................................................ 70
TABLE 27: TRANSMIT CONTROL REGISTER - CHANNEL 0 ADDRESS LOCATION = 0X04 ......................................... 75
TABLE 28: RECEIVE CONTROL REGISTER - CHANNEL 0 ADDRESS LOCATION = 0X05 ........................................... 78
TABLE 29: CHANNEL CONTROL REGISTER - CHANNEL 0 ADDRESS LOCATION = 0X06 ......................................... 80
TABLE 30: JITTER ATTENUATOR CONTROL REGISTER - CHANNEL 0 ADDRESS LOCATION = 0X07 ......................... 83
8.0 Diagnostic Features: ........................................................................................................................ 85
8.1 PRBS GENERATOR AND DETECTOR: ................................................................................................................ 85
8.2 LOOPBACKS: ............................................................................................................................................... 85
8.2.1 ANALOG LOOPBACK: ....................................................................................................................... 85
Figure 25. PRBS MODE ................................................................................................................................. 85
Figure 26. Analog Loopback ........................................................................................................................... 86
8.2.2 DIGITAL LOOPBACK: ........................................................................................................................ 87
8.2.3 REMOTE LOOPBACK: ....................................................................................................................... 87
Figure 27. Digital Loopback ............................................................................................................................ 87
Figure 28. Remote Loopback .......................................................................................................................... 87
8.3 TRANSMIT ALL ONES (TAOS): ................................................................................................................... 88
Figure 29. Transmit All Ones (TAOS) ............................................................................................................. 88
9.0 THE SONET/SDH DE-SYNC FUNCTION WITHIN THE XRT75L03D ............................................... 89
9.1 BACKGROUND AND DETAILED INFORMATION - SONET DE-SYNC APPLICATIONS .......................... 89
Figure 30. A Simple Illustration of a DS3 signal being mapped into and transported over the SONET Network
90
9.2 MAPPING/DE-MAPPING JITTER/WANDER ................................................................................................ 91
9.2.1 HOW DS3 DATA IS MAPPED INTO SONET ...................................................................................... 91
Figure 31. A Simple Illustration of the SONET STS-1 Frame ......................................................................... 92
Figure 32. A Simple Illustration of the STS-1 Frame Structure with the TOH and the Envelope Capacity Bytes
Designated .................................................................................................................................... 93
Figure 33. The Byte-Format of the TOH within an STS-1 Frame .................................................................... 94
Figure 34. The Byte-Format of the TOH within an STS-1 Frame .................................................................... 95
Figure 35. Illustration of the Byte Structure of the STS-1 SPE ....................................................................... 96
Figure 36. An Illustration of Telcordia GR-253-CORE's Recommendation on how map DS3 data into an STS-1
SPE ............................................................................................................................................... 97
Figure 37. A Simplified "Bit-Oriented" Version of Telcordia GR-253-CORE's Recommendation on how to map
DS3 data into an STS-1 SPE ........................................................................................................ 97
9.2.2 DS3 Frequency Offsets and the Use of the "Stuff Opportunity" Bits ............................................ 98
Figure 38. A Simple Illustration of a DS3 Data-Stream being Mapped into an STS-1 SPE, via a PTE .......... 99
Figure 39. An Illustration of the STS-1 SPE traffic that will be generated by the "Source" PTE, when mapping in
a DS3 signal that has a bit rate of 44.736Mbps + 1ppm, into an STS-1 signal .......................... 100
9.3 JITTER/WANDER DUE TO POINTER ADJUSTMENTS .......................................................................................... 102
9.3.1 The Concept of an STS-1 SPE Pointer ........................................................................................... 102
Figure 40. An Illustration of the STS-1 SPE traffic that will be generated by the Source PTE, when mapping a
DS3 signal that has a bit rate of 44.736Mbps - 1ppm, into an STS-1 signal .............................. 102
Figure 41. An Illustration of an STS-1 SPE straddling across two consecutive STS-1 frames ..................... 103
9.3.2 Pointer Adjustments within the SONET Network .......................................................................... 104
Figure 42. The Bit-format of the 16-Bit Word (consisting of the H1 and H2 bytes) with the 10 bits, reflecting the
location of the J1 byte, designated ............................................................................................. 104
Figure 43. The Relationship between the Contents of the "Pointer Bits" (e.g., the 10-bit expression within the H1
and H2 bytes) and the Location of the J1 Byte within the Envelope Capacity of an STS-1 Frame ...
104
9.3.3 Causes of Pointer Adjustments ...................................................................................................... 105
Figure 44. An Illustration of an STS-1 signal being processed via a Slip Buffer ........................................... 106
Figure 45. An Illustration of the Bit Format within the 16-bit word (consisting of the H1 and H2 bytes) with the "I"
bits designated ............................................................................................................................ 107
Figure 46. An Illustration of the Bit-Format within the 16-bit word (consisting of the H1 and H2 bytes) with the
"D" bits designated ...................................................................................................................... 108
9.3.4 Why are we talking about Pointer Adjustments? .......................................................................... 109
9.4 CLOCK GAPPING JITTER ................................................................................................................................. 109
Figure 47. Illustration of the Typical Applications for the XRT75L03D in a SONET De-Sync Application .... 109
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