XR16C2852 Datasheet, PDF (23/42 Pages) Exar Corporation – 3.3V AND 5V DUART WITH 128-BYTE FIFO

XR16C2852
REV. 2.0.0
3.3V AND 5V DUART WITH 128-BYTE FIFO
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FCR[0]: TX and RX FIFO Enable
• Logic 0 = Disable the transmit and receive FIFO
(default).
• Logic 1 = Enable the transmit and receive FIFOs.
This bit must be set to logic 1 when other FCR bits
are written or they will not be programmed.
FCR[1]: RX FIFO Reset
This bit is only active when FCR bit-0 is a ‘1’.
• Logic 0 = No receive FIFO reset (default)
• Logic 1 = Reset the receive FIFO pointers and
FIFO level counter logic (the receive shift register is
not cleared or altered). This bit will return to a logic
0 after resetting the FIFO.
FCR[2]: TX FIFO Reset
This bit is only active when FCR bit-0 is a ‘1’.
• Logic 0 = No transmit FIFO reset (default).
• Logic 1 = Reset the transmit FIFO pointers and
FIFO level counter logic (the transmit shift register
is not cleared or altered). This bit will return to a
logic 0 after resetting the FIFO.
FCR[3]: DMA Mode Select
Controls the behavior of the -TXRDY and -RXRDY
pins. See DMA operation section for details.
• Logic 0 = Normal Operation (default).
• Logic 1 = DMA Mode.
FCR[5:4]: Transmit FIFO Trigger Select
(logic 0 = default, TX trigger level = one)
These 2 bits set the trigger level for the transmit FIFO.
The UART will issue a transmit interrupt when the
number of characters in the FIFO falls below the se-
lected trigger level, or when it gets empty in case that
the FIFO did not get filled over the trigger level on last
re-load. Table 10 below shows the selections. EFR
bit-4 must be set to ‘1’ before these bits can be ac-
cessed. Note that the receiver and the transmitter
cannot use different trigger tables. Whichever selec-
tion is made last applies to both the RX and TX side.
FCR[7:6]: Receive FIFO Trigger Select
(logic 0 = default, RX trigger level =1)
The FCTR Bits 5-4 are associated with these 2 bits.
These 2 bits are used to set the trigger level for the
receive FIFO. The UART will issue a receive interrupt
when the number of the characters in the FIFO cross-
es the trigger level. Table 10 shows the complete se-
lections. Note that the receiver and the transmitter
cannot use different trigger tables. Whichever selec-
tion is made last applies to both the RX and TX side.
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