45111 Datasheet, PDF (88/184 Pages) List of Unclassifed Manufacturers – 14-DAY MONEY BACK GUARANTEE

10 SX Special Features and Coding Tips
Table 20 - MODE Register Settings
MODE Port A
Port B
Port C* Port D*
$0F
TRIS_A
TRIS_B
TRIS_C
TRIS_D
$0E
PLP_A
PLP_B
PLP_C
PLP_D
$0D
LVL_A
LVL_B
LVL_C
LVL_D
$0C
ST_B
ST_C
ST_D
$0B
WKEN_B
$0A
WKED_B
$09
Swap W with WKPEN_B
$08
Swap W with COMP_B
$07 - $00
* Port C not available on SX20 devices, Port D and E only available on SX48/52 devices.
NOTE: More options exist for the SX48/52 parts. See chapter 15.4.2 for details.
Port E*
TRIS_E
PLP_E
LVL_E
ST_E
10.2.1 Port Direction
Each of the I/O pins in each of the ports can be configured to an input or output direction by writing to
the appropriate tristate register (TRIS_A, TRIS_B, TRIS_C, TRIS_D and TRIS_E). The default I/O pin
direction is input. I/O pin direction configuration is usually done once, near the start of code, however,
the pin directions can be changed multiple times at any place in the code.
To configure the direction of the I/O pins to inputs or outputs:
1) Set the MODE register to $0F (the default value at startup).
2) Use the port configuration instruction to set the individual directions of each I/O pin within each
port. A high bit (1) sets the corresponding pin to input mode and a low bit (0) sets the pin to out-
put mode.
The following code snippet demonstrates this:
; Direction Configuration
;
MODE $0F
; Set Mode to allow Direction configuration
MOV !ra,#%0000
; Port A bits 0-3 to output
MOV !rb,#%11110000 ; Port B bits 4-7 to input, bits 0-3 output
MOV !rc,#%00001111 ; Port C bits 4-7 to output, bits 0-3 input
If the logic-level of output pins are expected to begin at a certain state (0 or 1), care should be taken to
set the output latch appropriately before setting the pin’s direction to output. Failing to do so may result
in a momentary glitch on the pin during initialization. For example, if all output pins were expected to
begin in a low state (0), insert the following lines above the previous code snippet:
Page 88 • SX-Key/Blitz Development System Manual 2.0 • Parallax, Inc.