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15 Appendix E: SX Data Sheet
15.2.4 Special Function Registers
Special function registers are registers used by the CPU to control the operation of the device. The
special function registers are contained within the first seven to ten locations of the global RAM bank as
shown above and are described below.
Table 30 - Special Function Registers
Addr.
Name
Function
$00
IND
Used for indirect addressing
$01
RTCC/WREG Real Time Clock Counter/WREG
$02
PC
Program Counter (low byte)
$03
STATUS
Holds status bits of ALU
$04
FSR
File Select Register
$05
RA
Port A register
$06
RB
Port B register
$07
RC
Port C register *
$08
RD
Port D register *
$09
RE
Port E register *
* RC, RD and RE are available as general purpose RAM in the SX20. RD and RE
are available as general purpose RAM in the SX28.
15.2.5 IND – The Indirect Register ($00)
This register, though not physically implemented, is used for indirect addressing. An instruction using
IND as its operand actually performs the operation on the register pointed to by the contents of FSR. See
Indirect Addressing, below, for more information.
15.2.6 Real Time Clock/Counter, WREG ($01)
RTCC is an 8-bit real-time timer/counter. In timer mode, the RTCC register will increment with every
instruction cycle (without prescaler). In counter mode, the RTCC will increment with every cycle on the
RTCC pin (with prescaler). The prescaler is used to lengthen the RTCC or watchdog timer effectively up
to 16-bits. Depending on the RTW bit (OPTION.7), register $01 contains either the RTCC, (RTW is set)
or the WREG, (RTW cleared). When WREG exists at $01, file register instructions (INC, DECSZ, etc) can
be used directly on WREG. When doing this, use the register address $01, or the WREG symbol, rather
than W. Using the W symbol instead of WREG to operate directly on the working register will result in
errors or incorrectly assembled code.
15.2.7 PC – Program Counter ($02)
PC is a register that holds the lower 8-bits of the program counter. It is accessible at runtime to perform
computed jumps and determine return addresses. Whenever an instruction is executed, and PC is the
destination, the upper 2 or 3 bits of the STATUS register are loaded into the high byte of the program
counter (bit 8 of the program counter is either cleared (CALL), or taken from the instruction opcode
SX-Key/Blitz Development System Manual 2.0 • Parallax, Inc. • Page 153