45111 Datasheet, PDF (118/184 Pages) List of Unclassifed Manufacturers – 14-DAY MONEY BACK GUARANTEE

12 Appendix B: Instruction Set Overview
12.5 Instruction Set Quick Reference
This chart is a quick reference to command syntax, size, cycle time, CARRYX sensitivity and affected
flags and registers. An explanation of the abbreviations used, can be found on the next page.
Instruction
ADD fr,W
ADD fr1,[#lit|fr2]
ADD W,fr
ADDB fr,{/}op.bit
AND fr,W
AND fr1,[#lit|fr2]
AND W,[#lit|fr]
BANK fr
CALL addr8
CJA
fr1,[#lit|fr2],addr9
CJAE fr1,[#lit|fr2],addr9
CJB
fr1,[#lit|fr2],addr9
CJBE fr1,[#lit|fr2],addr9
CJE
fr1,[#lit|fr2],addr9
CJNE fr1,[#lit|fr2],addr9
CLC
CLR
[fr|W|!WDT]
CLRB op.bit
CLZ
CSA
fr1,[#lit|fr2]
CSAE fr1,[#lit|fr2]
CSB
fr1,[#lit|fr2]
CSBE fr1,[#lit|fr2]
CSE
fr1,[#lit|fr2]
CSNE fr1,[#lit|fr2]
DEC
fr
DECSZ fr
DJNZ fr,addr9
IJNZ
fr,addr9
INC
fr
INCSZ fr
IREAD
JB
op.bit,addr9
JC
addr9
JMP
[addr9|W]
JMP
[W|PC+W]
JNB
op.bit,addr9
JNC
addr9
JNZ
addr9
JZ
addr9
MODE lit
MOV fr, W
MOV fr1,[#lit|fr2]
MOV fr,M
MOV W,{/|++|--}fr
Table 25 - SX Instruction Set Quick Reference
Affects
W C Instruction
Affects
WC
fr C DC Z
1 1 MOV W,{<<|>>}fr
WC
11
fr1 W C DC Z 2 2 MOV W,<>fr
W
11
W C DC Z
1 1 MOV W,fr-W
W C DC Z
11
fr Z
2 2 MOV W,[#lit|M]
W
11
fr Z
1 1 MOV M,fr
WMZ
22
fr1 W Z
2 2 MOV M,[#lit|W]
M
11
WZ
1 1 MOV !OPTION,[fr|#lit] [W Z OPT|W OPT] 2 2
FSR
1 1 MOV !OPTION,W
OPT
11
PC
1 3 MOV !port,[fr|#lit]
[W Z !port|W !port] 2 2
W C DC Z
4 4,6 MOV !port,W
!port (W)
11
W C DC Z
4 4,6 MOVB op1.bit1,{/}op2.bit2
op1.bit1
44
W C DC Z
4 4,6 MOVSZ W, [++|--]
W
1 1,2
W C DC Z
4 4,6 NOP
none
11
W C DC Z
4 4,6 NOT
[fr|W]
[fr Z|W Z]
11
W C DC Z
4 4,6 OR
fr,W
fr Z
11
C
1 1 OR
fr1,[#lit|fr2]
fr1 W Z
22
[fr Z|W Z|(*1)] 1 1 OR
W,[fr, #lit]
WZ
11
op.bit
1 1 PAGE addr12
PAx
11
Z
1 1 RET
PC
13
W C DC Z
3 3,4 RETI
C DC Z PAx PC W 1 3
W C DC Z
3 3,4 RETIW
RTCC (*2)
13
W C DC Z
3 3,4 RETP
PAx, PC
13
W C DC Z
3 3,4 RETW #lit{,#lit…}
PC W
x 3*x
W C DC Z
3 3,4 RL
fr
fr C
11
W C DC Z
3 3,4 RR
fr
fr C
11
fr Z
1 1 SB
op.bit
PC
1 1,2
fr
1 1,2 SC
PC
1 1,2
fr Z PC
2 2,4 SETB
op.bit
op.bit
11
fr Z PC
2 2,4 SKIP
PC
12
fr Z
1 1 SLEEP
WDT TO PD
11
fr
1 1,2 SNB
op.bit
PC
1 1,2
MODE W
1 4 SNC
PC
1 1,2
PC
2 2,4 SNZ
PC
1 1,2
PC
2 2,4 STC
C
1 1,2
PC
1 3 STZ
Z
1 1,2
[PC|PC C DC Z] 1 3 SUB
fr1,[#lit|fr2]
fr1 W C DC Z
22
PC
2 2,4 SUB
fr,W
fr C DC Z
11
PC
2 2,4 SUBB fr,{/}op.bit
fr Z
22
PC
2 2,4 SWAP fr
fr
11
PC
2 2,4 SZ
PC
1 1,2
M
1 1 TEST
[fr|W]
Z
11
fr
1 1 XOR
fr1,[#lit|fr2]
fr1 W Z
22
[fr1 W|fr1 W Z] 2 2 XOR
fr,W
fr Z
11
fr W
2 2 XOR
W,[fr|#lit]
WZ
11
WZ
11
Page 118 • SX-Key/Blitz Development System Manual 2.0 • Parallax, Inc.