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15 Appendix E: SX Data Sheet
Figure 29 - SX48/52 Indirect register addressing
fr (5-bit address in instruction)
4
3
2
1
0
Must be = $00
$00
$01 - $FF
FSR ($04)
7
6
5
4
3
2
1
0
Bank Selection Bits
Register Address
$00-
$01-
$02-
Global
IND
RTCC
PC
$0F- $0F
$10-
$11-
$12-
Bank 0
$0
$1
$2
$1F- $F
Bank 1
$0
$1
$2
—
—
$F
Bank 2
$0
$1
$2
$F
Bank 15
$0
———
$1
$2
$F
This example for the SX20/28 will clear every General Purpose RAM register on every bank using
indirect addressing.
Init
mov FSR, #$10
; FSR = addr of 1^st RAM Reg.
Loop
clr IND
; Clear register
inc FSR
; Point to next register
setb FSR.4
; Keep us on G.P. RAM area
cjne FSR, #$10, Loop ; Repeat until all registers
15.2.12 The Bank Instruction
; have been cleared
Often it is desirable to set the bank select bits of the FSR with one instruction cycle (the MOV FSR,
#literal commands above take two cycles). The SX instruction set offers such an instruction called Bank.
The Bank instruction sets the upper bits of the FSR to point to the RAM bank required. Note: On the
SX48/52, the BANK instruction only selects one of 8 banks in either the lower 8 or upper 8 banks. FSR.7 selects
the lower or upper group of 8 banks. To select a bank, use MOV FSR, #literal or add an SETB FSR.7 instruction
after the BANK instruction. Here’s an example of how to use the Bank instruction on the SX20/28:
SX-Key/Blitz Development System Manual 2.0 • Parallax, Inc. • Page 161