W5500 Datasheet, PDF (57/65 Pages) List of Unclassifed Manufacturers – Supports 8 independent sockets simultaneously

Ex) In case of 2048(0x0800) in S0_RX_RD,
0x0028
0x08
0x0029
0x00
Sn_RX_WR (Socket n RX Write Pointer Register) [R] [0x002A-0x002B] [0x0000]
Sn_RX_WR is initialized by OPEN command and it is auto-increased by the data
reception.
If the increased value exceeds the maximum value 0xFFFF, (greater than 0x10000
and the carry bit occurs), then the carry bit is ignored and will automatically update
with the lower 16bits value.
Ex) In case of 2048(0x0800) in S0_RX_WR,
0x002A
0x08
0x002B
0x00
Sn_IMR (Socket n Interrupt Mask Register) [R/W] [0x002C] [0xFF]
Sn_IMR masks the interrupt of Socket n. Each bit corresponds to each bit of Sn_IR.
When a Socket n Interrupt is occurred and the corresponding bit of Sn_IMR is „1‟, the
corresponding bit of Sn_IR becomes „1‟. When both the corresponding bit of Sn_IMR
and Sn_IR are „1‟ and the n-th bit of IR is „1‟, Host is interrupted by asserted INTn
PIN to low.
7
6
5
4
3
2
1
0
Reserved Reserved Reserved SEND_OK TIMEOUT RECV
DISCON
CON
Bit Symbol
Description
7~5 Reserved Reserved
4
SENDOK Sn_IR(SENDOK) Interrupt Mask
3 TIMEOUT Sn_IR(TIMEOUT) Interrupt Mask
2
RECV
Sn_IR(RECV) Interrupt Mask
1
DISCON Sn_IR(DISCON) Interrupt Mask
0
CON
Sn_IR(CON) Interrupt Mask
W5500 Datasheet Version1.0 (August 2013)
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