W5500 Datasheet, PDF (19/65 Pages) List of Unclassifed Manufacturers – Supports 8 independent sockets simultaneously

1 Byte WRITE Access Example
When the Host writes Data 0xAA to „Socket Interrupt Mask Register (SIMR) of
Common Register Block by using VDM mode, the data is written with the SPI Frame
below.
Offset Address = 0x0018
BSB[4:0]
= ‘00000’
RWB
= ‘1’
OM[1:0]
1^st Data
= ‘00’
= 0xAA
The External Host asserts (High-to-Low) SCSn before transmitting SPI Frame, then
the Host transmits 1 bit with synchronizing the Toggle SCLK. The External Host de-
asserts (Low-to-High) the SCSn at the end of SPI Frame transmit. (Refer to the Figure
9)
SCSn
Figure 9. SIMR Register Write in VDM Mode
W5500 Datasheet Version1.0 (August 2013)
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