W5500 Datasheet, PDF (23/65 Pages) List of Unclassifed Manufacturers – Supports 8 independent sockets simultaneously

N-Bytes Read Access Example
When the Host reads 5 Bytes Data (0xAA, 0xBB, 0xCC, 0xDD, 0xEE) from the Socket
3‟s RX Buffer Block 0x0100 Address by using VDM mode, 5 bytes data are read with the
SPI Frame as below.
Offset Address = 0x0100
BSB[4:0]
= ‘01111’
RWB
= ‘0’
OM[1:0]
1^st Data
2^nd Data
3^rd Data
4^th Data
5^th Data
= ‘00’
= 0xAA
= 0xBB
= 0xCC
= 0xDD
= 0xEE
The N-Bytes Read Access is shown in Figure 13.
The 5 bytes of Data (0xAA, 0xBB, 0xCC, 0xDD, 0xEE) are read sequentially from the
Socket 3‟s Rx Buffer Block Address 0x0100 ~ 0x0104.
The External Host asserts (High-to-Low) SCSn before transmitting SPI Frame.
The External Host de-asserts (Low-to-High) the SCSn at the end of the SPI Frame
Data Phase.
SCSn
SCSn
Figure 13. 5 Byte Data Read at 3rd Socket‟s RX Buffer Block 0x0100 in VDM mode
W5500 Datasheet Version1.0 (August 2013)
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