SMC91C100 Datasheet, PDF (63/83 Pages) List of Unclassifed Manufacturers – FEAST Fast Ethernet Controller

VL
BUS
SIGNA
L
nBE0
nBE1
nBE2
nBE3
nADS
IRQn
D0-D31
SMC91C10
0 SIGNAL
nBE0 nBE1
nBE2 nBE3
nADS,
nCYCLE
INTR0-
INTR3
D0-D31
Table 3 - VL Local Bus Signal Connections
NOTES
Byte enables. Latched transparently by nADS rising edge.
Address Strobe is connected directly to the VL bus. nCYCLE is created typically
by using nADS delayed by one LCLK.
Typically uses the interrupt lines on the ISA edge connector of VL bus.
32 bit data bus. The bus byte(s) used to access the device are a function of
nBE0-nBE3:
nLDEV
VCC
GND
OPEN
nLDEV
nRD, nWR
A1,
nVLBUS
nDATACS
B BE1 nBE BE3
E
2
0
00
0
0 Double word access
00
1
1 Low word access
11
0
0 High word access
01
1
1 Byte 0 access
10
1
1 Byte 1 access
11
0
1 Byte 2 access
11
1
0 Byte 3 access
n
Not used = tri-state on reads, ignored on writes. Note that nBE2 and nBE3
override the value of A1, which is tied low in this application.
nLDEV is a totem pole output. nLDEV is active on valid decodes of A15-A4 and
AEN=0.
UNUSED PINS
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