SMC91C100 Datasheet, PDF (29/83 Pages) List of Unclassifed Manufacturers – FEAST Fast Ethernet Controller

I/O SPACE - BANK1
OFFSET
NAME
TYPE
SYMBOL
0
CONFIGURATION REGISTER
READ/WRITE
CR
The Configuration Register holds bits that define the adapter configuration and are not expected to change
during run-time. This register is part of the EEPROM-saved setup.
HIGH
BYTE
MII
SELECT
1
X
NO WAIT
X
0
X
FULL
STEP
0
AUI
SELECT
0
0
LOW
BYTE
1
0
RESERVED
INT SEL1 INT SEL0
1
0
1
1
0
0
0
X
MII SELECT Used to select the network interface
port. When set, the SMC91C100 will use its MII
port and interface a PHY device at the nibble rate.
When clear, the SMC91C100 will use its 10 Mbps
ENDEC interface. This bit drives the MII SEL pin.
Switching between ports should be done with
transmitter and receiver disabled and no
transmit/receive packets in progress.
NO WAIT When set, does not request additional
wait states. An exception to this are accesses to
the Data Register if not ready for a transfer.
When clear, negates IOCHRDY for two to three
clocks on any cycle to the SMC91C100.
AUI SELECT This bit is a general purpose output
port. Its value drives pin AUISEL and it is typically
connected to MODE1 pin of the SMC83C694C.
It can be used to select AUI vs. 10BASE-T, or as
a general purpose non-volatile configuration pin.
Defaults low.
INT SEL1-0 Used to select one out of four
interrupt pins. The three unused interrupts are
tristated.
FULL STEP This bit is a general purpose output
port. Its inverse value drives pin nFSTEP and it is
typically connected to SEL pin of the
SMC83C694C. It can be used to select the
signaling mode for the AUI, or as a general
purpose non-volatile configuration pin. Defaults
low.
INT SEL1
0
0
1
1
INT SEL0
0
1
0
1
PIN USED
INTR0
INTR1
INTR2
INTR3
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