MC80F0204 Datasheet, PDF (92/126 Pages) List of Unclassifed Manufacturers – 8-BIT SINGLE-CHIP MICROCONTROLLERS

MC80F0104/0204
Preliminary
19. POWER SAVING OPERATION
TheMC80F0104/0204 has two power-down modes. In
power-down mode, power consumption is reduced
considerably. For applications where power consumption
is a critical factor, device provides two kinds of power sav-
ing functions, STOP mode and SLEEP mode. Table 19-1
19.1 Sleep Mode
In this mode, the internal oscillation circuits remain active.
Oscillation continues and peripherals are operate normally
but CPU stops. Movement of all peripherals is shown in
Table 19-1. SLEEP mode is entered by setting the SSCR
register to “0Fh”. It is released by Reset or interrupt. To be
shows the status of each Power Saving Mode. SLEEP
mode is entered by the SSCR register to “0Fh”., and STOP
mode is entered by STOP instruction after the SSCR regis-
ter to “5Ah”.
released by interrupt, interrupt should be enabled before
SLEEP mode.
SSCR
WW WWWW WW
7
6
5
4
3
2
1
0
ADDRESS: 0F5_H
INITIAL VALUE: 0000 0000_B
Power Down Control
5A_H: STOP mode
0F_H: SLEEP mode
NOTE :
To get into STOP mode, SSCR must be set to 5AH just before STOP instruction execution.
At STOP mode, Stop & Sleep Control Register (SSCR) value is cleared automatically when released.
To get into SLEEP mode, SSCR must be set to 0FH.
Figure 19-1 STOP and SLEEP Control Register
Release the SLEEP mode
The exit from SLEEP mode is hardware reset or all inter-
rupts. Reset re-defines all the Control registers but does not
change the on-chip RAM. Interrupts allow both on-chip
RAM and Control registers to retain their values.
If I-flag = 1, the normal interrupt response takes place. If I-
flag = 0, the chip will resume execution starting with the
instruction following the SLEEP instruction. It will not
vector to interrupt service routine. (refer to Figure 19-4 )
When exit from SLEEP mode by reset, enough oscillation
stabilizing time is required to normal operation. Figure 19-
3 shows the timing diagram. When released from the
SLEEP mode, the Basic interval timer is activated on
wake-up. It is increased from 00_H until FF_H. The count
overflow is set to start normal operation. Therefore, before
SLEEP instruction, user must be set its relevant prescaler
divide ratio to have long enough time (more than 20msec).
This guarantees that oscillator has started and stabilized.
By interrupts, exit from SLEEP mode is shown in Figure
19-2 . By reset, exit from SLEEP mode is shown in Figure
19-3 .
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Mar. 2005 Ver 0.2