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MC80F0204 Datasheet, PDF (44/126 Pages) List of Unclassifed Manufacturers – 8-BIT SINGLE-CHIP MICROCONTROLLERS
MC80F0104/0204
Preliminary
CKCTLR
[2:0]
000
001
010
011
100
101
110
111
Source clock
fXIN÷8
fXIN÷16
fXIN÷32
fXIN÷64
fXIN÷128
fXIN÷256
fXIN÷512
fXIN÷1024
Interrupt (overflow) Period (ms)
@ fXIN = 8MHz
0.256
0.512
1.024
2.048
4.096
8.192
16.384
32.768
Table 11-1 Basic Interval Timer Interrupt Period
76543210
CKCTLR ADRST - RCWDT WDTONBBTTCCLL BTS2 BTS1 BTS0
ADDRESS: 0F2H
INITIAL VALUE: 0-01 0111B
Caution:
Both register are in same address,
when write, to be a CKCTLR,
when read, to be a BITR.
Basic Interval Timer source clock select
000: fXIN ÷ 8
001: fXIN ÷ 16
010: fXIN ÷ 32
011: fXIN ÷ 64
100: fXIN ÷ 128
101: fXIN ÷ 256
110: fXIN ÷ 512
111: fXIN ÷ 1024
Clear bit
0: Normal operation (free-run)
1: Clear 8-bit counter (BITR) to “0”. This bit becomes 0 automatically
after one machine cycle, and starts counting.
Watchdog timer Enable bit
0: Operate as 7-bit Timer
1: Enable Watchdog Timer operation
See the section “Watchdog Timer”.
RC Watchdog Selection bit
0: Disable Internal RC Watchdog Timer
1: Enable Internal RC Watchdog Timer
Address Trap Reset Selection
0: Enable Address Fail Reset
1: Disable Address Fail Reset
BITR
76543210
BTCL
8-BIT FREE-RUN BINARY COUNTER
ADDRESS: 0F2H
INITIAL VALUE: Undefined
Figure 11-2 BITR: Basic Interval Timer Mode Register
Example 1:
Example 2:
Interrupt request flag is generated every 8.192ms at 4MHz.
Interrupt request flag is generated every 8.192ms at 8MHz.
:
LDM
SET1
EI
:
CKCTLR,#1BH
BITE
:
LDM
SET1
EI
:
CKCTLR,#1CH
BITE
40
Mar. 2005 Ver 0.2