MC80F0204 Datasheet, PDF (54/126 Pages) List of Unclassifed Manufacturers – 8-BIT SINGLE-CHIP MICROCONTROLLERS

MC80F0104/0204
Preliminary
Example: Make 1ms interrupt using by Timer0 at 4MHz
LDM
LDM
SET1
EI
TM0,#0FH
TDR0,#124
T0E
; divide by 32
; 8us x (124+1)= 1ms
; Enable Timer 0 Interrupt
; Enable Master Interrupt
When
TM0 = 0000 1111_B (8-bit Timer mode, Prescaler divide ratio = 32)
TDR0 = 124_D = 7C_H
f_XIN = 4 MHz
INTERRUPT PERIOD =
1
4 × 10⁶ Hz
× 32 × (124+1) = 1 ms
TDR0
7C
~~
0
MATCH
(TDR0 = T0)
7C
7B
up-count
7A
~~
6
5
4
3
2
1
0
Count Pulse
Period
~~
8 µs
Timer 0 (T0IF)
Interrupt
Interrupt period
= 8 µs x (124+1)
Occur interrupt
Occur interrupt
Occur interrupt
TIME
Figure 13-6 Timer Count Example
13.1.2 8-bit Event Counter Mode
In this mode, counting up is started by an external trigger.
This trigger means rising edge of the EC0 or EC1 pin input.
Source clock is used as an internal clock selected with tim-
er mode register TM0 or TM2. The contents of timer data
register TDRn (n = 0,1,2,3) are compared with the contents
of the up-counter Tn. If a match is found, an timer interrupt
request flag TnIF is generated, and the counter is cleared to
“0”. The counter is restart and count up continuously by
every falling edge of the EC0 or EC1 pin input. The maxi-
mum frequency applied to the EC0 or EC1 pin is f_XIN/2
[Hz].
In order to use event counter function, the bit 4, 5 of the
Port Selection Register PSR0(address 0F8_H) is required to
be set to “1”.
After reset, the value of timer data register TDRn is initial-
ized to "0", The interval period of Timer is calculated as
below equation.
Period (sec) = _f---_X-¹--_I--_N-- × 2 × Divide Ratio × (TDRn+1)
Start count
ECn pin input
Up-counter
TDR1
T1IF interrupt
0
1
2
n
n-1 n 0
1
2
Figure 13-7 Event Counter Mode Timing Chart
50
Mar. 2005 Ver 0.2