ACD82224 Datasheet, PDF (71/77 Pages) List of Unclassifed Manufacturers – 24 Ports 10/100 Fast Ethernet Switch

0
Aged address exists
1
1
New address exists
1
2
Reserved
1
3
Reserved
1
4
Bucket overflowed
1
5
Command is done
1
6
System initialization is completed
1
7
Self test failure
1
nLearnReg0 ~ nLearnReg2 (Register 15 ~ Register 17)
The nLearnReg[2:0] are used to disable address learning activity from a particular port. If the bit
corresponding to a port is set, the ARL will not try to learn new addresses from that port.
The nLearnReg0/1/2 are bit-to-port mapping registers.
The bit[0:7] of nLearnReg0 is represented by port[0:7].
The bit[0:7] of nLearnReg1 is represented by port[8:15].
The bit[0:7] of nLearnReg2 is represented by port[16:23].
AgeTimeReg0 and AgeTimeReg1 (Register 18 and Register 19)
The AgeTimeReg[1:0] are used to specify the period of address aging control. The aging period
can be from 0 to 65535 units, with each unit counted as 2.684 second. The default age time is
300 seconds. To make the new setting age period effective, CPU must send “ARL Reset”
(0xff, see ARL Table-3) command to ARL after configuring the new AgeTimeReg[1:0] and
set the bit-0 of Register-20 to one to wake up ARL engine
PosCfgReg (Register 20)
The PosCfgReg is a configuration register whose default value is determined by the pull-up or
pull-down status of the associated hardware pin. The bits of PosCfgReg0 is listed as follows:
Bit
Description
Default Shared Pin
0
Reserved
1
NOCPU
0 – Wait for CPU
1 –ARL initializes by itself
2
Reserved
0
NA
0
P00TXEN
0
P02TXEN
Note: If NOCPU is set to 0, the ARL will not start the initialization process until Bit-1 of
PosCfgReg is set to 1.
6. COMMAND DESCRIPTION
Command 09H
Description: Add the specified MAC address into the address table.
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