ACD82224 Datasheet, PDF (64/77 Pages) List of Unclassifed Manufacturers – 24 Ports 10/100 Fast Ethernet Switch

1. SUMMARY
The internal Address Resolution Logic (ARL) of the switch controllers automatically builds up an
address table and maps up to 2,048 MAC addresses for the associated ports. CPU intervention
is not required in an UN-managed system.
For a managed system, the management CPU can configure the operation mode of the ARL,
learn all the addresses in the address table, add new addresses into the lookup table, control
security or filtering feature of each address entry etc.
The ARL high performance design guarantee very low latency and will never slow down the
frame switching operation. It helps the switch controllers maintain wire speed forwarding rate
under any type of traffic load.
The 2K internal addresses space can be expanded to 11K entries by using the external ARL,
ACD80800.
Figure-1: Built-in ARL Block Diagram
Internal Switch Interface
External CPU Interface
Address
Learning
Engine
Address
Aging
Engine
Address
Lookup
Engine
CPU Interface Engine
Address Table
(2048 Entries)
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