ACD82224 Datasheet, PDF (7/77 Pages) List of Unclassifed Manufacturers – 24 Ports 10/100 Fast Ethernet Switch

4. SYSTEM DESCRIPTION
The ACD82224 is a single chip implementation of a 24-port Fast Ethernet switch. Together with
external SRAM devices and transceiver devices, it can be used to build a complete 10/100 Mbps
Fast Ethernet switch. Each port can be either auto-sensing or manually selected to run at 10
Mbps or 100 Mbps speed rates and under Full or Half-duplex mode.
There are four (4) major functional blocks inside the ACD82224:
(a) The Media Access Controller (MAC)
(b) The Queue Manager
(c) The Lookup Engine
(d) The Register file
(e) The MIB Engine interface
There are five (5) types of interfaces:
(a) RMII interfaces
(b) RMII/MII selectable interface
(c) Memory interface
(d) External-ARL interface
(e) External-MIB interface
MACs, RMII & MII Interfaces
There are 24 independent MACs within the ACD82224. The MAC controls the receiving,
transmitting, and deferring process of each individual port, in accordance to the IEEE 802.3 and
802.3u standards. The MAC logic also provides framing, FCS checking, error handling, status
indication and flow control functions (backpressure & pause-frame). Each MAC interfaces with
an external transceiver through a RMII (Reduced MII) interface. The last MAC has a selectable
RMII/MII interface. The MII mode allows direct connection with the ACD80900 (MIB), which also
acts as a three-port switch for the management CPU to share the regular switch port for in-band
management.
Queue Manager
The device utilizes ACD’s proprietary BASIQ (Bandwidth Assured Switching with Intelligent
Queuing) technology. It efficiently enforces the first-in-first-out rule of Ethernet Bridge-type
devices. It also enables a true non-blocking frame switching operation at wire speeds for high
throughput and high port density Ethernet switch design.
Built-in ARL & External-ARL Interface
The on-chip Lookup Engine implements a 2,048 entries MAC address lookup table. It maps each
destination address with a corresponding port ID. Each MAC address is automatically learned by
the LOOKUP ENGINE after an error-free frame is received. The address entries can also be
managed for aging, locking, and forced filtering. Through the serial CPU interface of the
ACD82224 switch, a management CPU can learn the address change in the lookup table.
Hence, the ACD82224 alone can be used to build a complete Fast Ethernet switch with up to
2,048 host connections. (See Appendix-A for detail)
For workgroup or backbone switches, the ACD82224 can support more MAC addresses per port
through the use of an external ARL chip, the ACD80800. The ACD82224 has a glueless ARL
interface that allows a supporting chip (ACD80800) to provide up to 11K MAC addresses per
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