ACD82224 Datasheet, PDF (66/77 Pages) List of Unclassifed Manufacturers – 24 Ports 10/100 Fast Ethernet Switch

The default aging time is 300 seconds. That means Address Aging Engine checks the timer
every 300 seconds from power up. If the new address is learned just after the aging-out checking
process finished. The worst case aging time can be about 600 seconds. You can program the
timer register through CPU interface (UART). The register is resided in Register18 and 19 of
ARL.
Address Lookup
Each destination address is passed to the Address Lookup Engine of the ARL. The Address
Lookup Engine checks if the destination address matches with any existing address in the
address table. If it does, the ARL returns the associated Port ID to switch controller. Otherwise,
a “no match” result is passed to switch controller.
CPU Interface
The CPU can access the registers of the ARL by sending commands to the UART data input line.
Each command is consists of action (read or write), register type, register index, and data. Each
result of command execution is returned to the CPU through the UART data output line.
Registers
The ARL provides a number of registers for the control CPU. Through these registers, the CPU
can read all address entries of the address table, delete particular addresses from the table, add
particular addresses into the table, secure an address from being changed, set filtering on some
addresses, change the hashing algorithm etc. Through interrupt request signals, the CPU can be
notified whenever it needs to retrieve data for a newly-learned address or an aged-out address
so that the CPU can build an exact same address table learned by the ARL.
CPU Interface Engine
The command sent by the control CPU is executed by the CPU Interface Engine. For example,
the CPU may send a command to learn the first newly learned address. The CPU Interface
Engine is responsible to find the newly learned address from the address table, and passes it to
the CPU. The CPU may request to learn next newly learned address. And the CPU Interface
Engine starts to search for next newly learned address from the address table.
Address Table
The address table can hold up to 2,048 MAC addresses, together with the associated port ID,
security flag, filtering flag, new flag, aging information etc. The address table resides in the
embedded SRAM inside the built-in ARL.
Page 65 of 77
Confidential
Page 65