ACD82224 Datasheet, PDF (58/77 Pages) List of Unclassifed Manufacturers – 24 Ports 10/100 Fast Ethernet Switch

Figure-9.5: SRAM (ZBT) Read/Write Timing
MCLK
nCE
nWE
ADDRESS
DATA
t1
t2
t3
t4
t5
t6
t7
A1
A2
A3
t8
t10
t9
Q1
t11
t12
A4
t13
Q2
D3
D4
t14
t15
T#
Description:
MIN MAX UNIT
t1 Clock cycle time
10
-
ns
t2 Clock HIGH time
4
-
ns
t3 Clock LOW time
4
-
ns
t4 Chip Enable setup time
3
-
ns
t5 Chip Enable hold time
2
-
ns
t6 Read/Write setup time
3
-
ns
t7 Read/Write hold time
2
-
ns
t8 Address setup time
3
-
ns
t9 Address hold time
2
-
ns
t10 Clock to output data in Low-Z 1.5
-
ns
t11 Clock to output data valid
-
5
ns
t12 Clock to output data invalid 1.5
-
ns
t13 Clock to output data in High-Z -
4
ns
t14 Input data setup time
3
-
ns
t15 Input data hold time
1
-
ns
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