ACD82224 Datasheet, PDF (36/77 Pages) List of Unclassifed Manufacturers – 24 Ports 10/100 Fast Ethernet Switch

PVID register (register 23)
The PVID registers assign VLAN IDs for each port. There are 24 PVID registers, one for each
port. A PVID consists of 4 bits, each corresponding bit mapping to one of the 4 VLANs. A port
can belong to more than one VLAN at the same time. Table-7.23 describes all the bits of this
register.
Table-7.23: PVID Register
Bit
Description
0
0 – port not in VLAN-I.
1 – port in VLAN-I.
1
0 – port not in VLAN-II.
1 – port in VLAN-II.
2
0 – port not in VLAN-III.
1 – port in VLAN-III.
3
0 – port not in VLAN-IV.
1 – port in VLAN-IV.
Default
Port 1~23
(index = 1~23)
1
0
0
0
Default
Port 0
(index = 0)
1
1
1
1
VPID register (register 24)
The VPID registers specify the dumping port for each VLAN. There are 4 VPID 5-bit registers,
one for each VLAN. A valid VPID's ID is “0” through “23". Table-7.24 describes all the bits of this
register. If the multiple VLANs are set, the dumping port for the associated VLAN has to be
assigned correctly even bit-12 of register-25 is set (unknown DA forwarded to all ports).
Table-7.24: VPID Registers (4 registers)
VPID register
Index
Bit
VPID[0]
0
4:0
VPID[1]
1
4:0
VPID[2]
2
4:0
VPID[3
3
4:0
Description
Dumping port ID for VLAN-1
Dumping port ID for VLAN-2
Dumping port ID for VLAN-3
Dumping port ID for VLAN-4
Default
“00000”
Port-0
POSCFG register (register 25)
The POSCFG register specifies a certain configuration setting for the switch system. The default
values of this register can be changed through pull-up/pull-down of specific pins, as described in
the “Configuration Interface” section of the “Interface Description” chapter. Table-7.25 describes
all the bits of this register.
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