LM3S8962 Datasheet, PDF (565/620 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S8962 Microcontroller
Pin Number
92
93
94
95
96
97
Pin Name
PB4
C0-
VDD
GND
PD4
CCP0
PD5
GNDA
98
VDDA
99
PD6
Fault
100
PD7
IDX0
Pin Type
I/O
I
-
-
I/O
I/O
I/O
-
-
I/O
I
I/O
I
Buffer Type Description
TTL
GPIO port B bit 4
Analog Analog comparator 0 negative input
Power Positive supply for I/O and some logic.
Power Ground reference for logic and I/O pins.
TTL
GPIO port D bit 4
TTL
Capture/Compare/PWM 0
TTL
GPIO port D bit 5
Power
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
Power
The positive supply (3.3 V) for the analog
circuits (ADC, Analog Comparators, etc.).
These are separated from VDD to minimize
the electrical noise contained on VDD from
affecting the analog functions.
TTL
GPIO port D bit 6
TTL
PWM Fault
TTL
GPIO port D bit 7
TTL
QEI module 0 index
Table 22-2. Signals by Signal Name
Pin Name
ADC0
ADC1
ADC2
ADC3
C0+
C0-
C0o
CAN0Rx
CAN0Tx
CCP0
CCP1
CMOD0
Pin Number
1
2
5
6
90
92
91
10
11
95
34
65
Pin Type
I
I
I
I
I
I
O
I
O
I/O
I/O
I/O
CMOD1
76
I/O
Fault
GND
GND
GND
GND
GND
99
I
9
-
15
-
21
-
33
-
39
-
Buffer Type Description
Analog Analog-to-digital converter input 0.
Analog Analog-to-digital converter input 1.
Analog Analog-to-digital converter input 2.
Analog Analog-to-digital converter input 3.
Analog Analog comparator 0 positive input
Analog Analog comparator 0 negative input
TTL
Analog comparator 0 output
TTL
CAN module 0 receive
TTL
CAN module 0 transmit
TTL
Capture/Compare/PWM 0
TTL
Capture/Compare/PWM 1
TTL
CPU Mode bit 0. Input must be set to logic 0
(grounded); other encodings reserved.
TTL
CPU Mode bit 1. Input must be set to logic 0
(grounded); other encodings reserved.
TTL
PWM Fault
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
September 02, 2007
565
Preliminary