LM3S8962 Datasheet, PDF (19/620 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S8962 Microcontroller
Register 18:
Register 19:
Register 20:
Register 21:
Register 22:
Register 23:
Register 24:
Register 25:
Register 26:
Register 27:
Register 28:
Register 29:
Ethernet PHY Management Register 1 – Status (MR1), address 0x01 .............................. 480
Ethernet PHY Management Register 2 – PHY Identifier 1 (MR2), address 0x02 ................. 482
Ethernet PHY Management Register 3 – PHY Identifier 2 (MR3), address 0x03 ................. 483
Ethernet PHY Management Register 4 – Auto-Negotiation Advertisement (MR4), address
0x04 ............................................................................................................................. 484
Ethernet PHY Management Register 5 – Auto-Negotiation Link Partner Base Page Ability
(MR5), address 0x05 ..................................................................................................... 486
Ethernet PHY Management Register 6 – Auto-Negotiation Expansion (MR6), address
0x06 ............................................................................................................................. 487
Ethernet PHY Management Register 16 – Vendor-Specific (MR16), address 0x10 ............. 488
Ethernet PHY Management Register 17 – Interrupt Control/Status (MR17), address
0x11 .............................................................................................................................. 490
Ethernet PHY Management Register 18 – Diagnostic (MR18), address 0x12 ..................... 492
Ethernet PHY Management Register 19 – Transceiver Control (MR19), address 0x13 ....... 493
Ethernet PHY Management Register 23 – LED Configuration (MR23), address 0x17 ......... 494
Ethernet PHY Management Register 24 –MDI/MDIX Control (MR24), address 0x18 .......... 495
Analog Comparator ..................................................................................................................... 496
Register 1: Analog Comparator Masked Interrupt Status (ACMIS), offset 0x00 .................................... 500
Register 2: Analog Comparator Raw Interrupt Status (ACRIS), offset 0x04 ......................................... 501
Register 3: Analog Comparator Interrupt Enable (ACINTEN), offset 0x08 ........................................... 502
Register 4: Analog Comparator Reference Voltage Control (ACREFCTL), offset 0x10 ......................... 503
Register 5: Analog Comparator Status 0 (ACSTAT0), offset 0x20 ....................................................... 504
Register 6: Analog Comparator Control 0 (ACCTL0), offset 0x24 ....................................................... 505
Pulse Width Modulator (PWM) .................................................................................................... 507
Register 1: PWM Master Control (PWMCTL), offset 0x000 ................................................................ 515
Register 2: PWM Time Base Sync (PWMSYNC), offset 0x004 ........................................................... 516
Register 3: PWM Output Enable (PWMENABLE), offset 0x008 .......................................................... 517
Register 4: PWM Output Inversion (PWMINVERT), offset 0x00C ....................................................... 518
Register 5: PWM Output Fault (PWMFAULT), offset 0x010 ................................................................ 519
Register 6: PWM Interrupt Enable (PWMINTEN), offset 0x014 ........................................................... 520
Register 7: PWM Raw Interrupt Status (PWMRIS), offset 0x018 ........................................................ 521
Register 8: PWM Interrupt Status and Clear (PWMISC), offset 0x01C ................................................ 522
Register 9: PWM Status (PWMSTATUS), offset 0x020 ...................................................................... 523
Register 10: PWM0 Control (PWM0CTL), offset 0x040 ....................................................................... 524
Register 11: PWM1 Control (PWM1CTL), offset 0x080 ....................................................................... 524
Register 12: PWM2 Control (PWM2CTL), offset 0x0C0 ...................................................................... 524
Register 13: PWM0 Interrupt and Trigger Enable (PWM0INTEN), offset 0x044 .................................... 526
Register 14: PWM1 Interrupt and Trigger Enable (PWM1INTEN), offset 0x084 .................................... 526
Register 15: PWM2 Interrupt and Trigger Enable (PWM2INTEN), offset 0x0C4 .................................... 526
Register 16: PWM0 Raw Interrupt Status (PWM0RIS), offset 0x048 .................................................... 528
Register 17: PWM1 Raw Interrupt Status (PWM1RIS), offset 0x088 .................................................... 528
Register 18: PWM2 Raw Interrupt Status (PWM2RIS), offset 0x0C8 ................................................... 528
Register 19: PWM0 Interrupt Status and Clear (PWM0ISC), offset 0x04C ........................................... 529
Register 20: PWM1 Interrupt Status and Clear (PWM1ISC), offset 0x08C ........................................... 529
Register 21: PWM2 Interrupt Status and Clear (PWM2ISC), offset 0x0CC ........................................... 529
Register 22: PWM0 Load (PWM0LOAD), offset 0x050 ....................................................................... 530
Register 23: PWM1 Load (PWM1LOAD), offset 0x090 ....................................................................... 530
Register 24: PWM2 Load (PWM2LOAD), offset 0x0D0 ....................................................................... 530
September 02, 2007
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Preliminary