LM3S8962 Datasheet, PDF (136/620 Pages) List of Unclassifed Manufacturers – Microcontroller

Hibernation Module
Register 8: Hibernation Masked Interrupt Status (HIBMIS), offset 0x01C
This register is the masked interrupt status for the Hibernation module interrupt sources.
Hibernation Masked Interrupt Status (HIBMIS)
Base 0x400F.C000
Offset 0x01C
Type RO, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
EXTW LOWBAT RTCALT1 RTCALT0
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:4
3
2
1
0
Name
reserved
EXTW
LOWBAT
RTCALT1
RTCALT0
Type
Reset Description
RO 0x000.0000 Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
RO
0
External Wake-Up Masked Interrupt Status
RO
0
Low Battery Voltage Masked Interrupt Status
RO
0
RTC Alert1 Masked Interrupt Status
RO
0
RTC Alert0 Masked Interrupt Status
136
September 02, 2007
Preliminary