LM3S8962 Datasheet, PDF (20/620 Pages) List of Unclassifed Manufacturers – Microcontroller

Table of Contents
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Register 48:
PWM0 Counter (PWM0COUNT), offset 0x054 ................................................................ 531
PWM1 Counter (PWM1COUNT), offset 0x094 ................................................................ 531
PWM2 Counter (PWM2COUNT), offset 0x0D4 ............................................................... 531
PWM0 Compare A (PWM0CMPA), offset 0x058 ............................................................. 532
PWM1 Compare A (PWM1CMPA), offset 0x098 ............................................................. 532
PWM2 Compare A (PWM2CMPA), offset 0x0D8 ............................................................. 532
PWM0 Compare B (PWM0CMPB), offset 0x05C ............................................................. 533
PWM1 Compare B (PWM1CMPB), offset 0x09C ............................................................. 533
PWM2 Compare B (PWM2CMPB), offset 0x0DC ............................................................ 533
PWM0 Generator A Control (PWM0GENA), offset 0x060 ................................................ 534
PWM1 Generator A Control (PWM1GENA), offset 0x0A0 ................................................ 534
PWM2 Generator A Control (PWM2GENA), offset 0x0E0 ................................................ 534
PWM0 Generator B Control (PWM0GENB), offset 0x064 ................................................ 537
PWM1 Generator B Control (PWM1GENB), offset 0x0A4 ................................................ 537
PWM2 Generator B Control (PWM2GENB), offset 0x0E4 ................................................ 537
PWM0 Dead-Band Control (PWM0DBCTL), offset 0x068 ................................................ 540
PWM1 Dead-Band Control (PWM1DBCTL), offset 0x0A8 ................................................. 540
PWM2 Dead-Band Control (PWM2DBCTL), offset 0x0E8 ................................................ 540
PWM0 Dead-Band Rising-Edge Delay (PWM0DBRISE), offset 0x06C ............................. 541
PWM1 Dead-Band Rising-Edge Delay (PWM1DBRISE), offset 0x0AC ............................. 541
PWM2 Dead-Band Rising-Edge Delay (PWM2DBRISE), offset 0x0EC ............................. 541
PWM0 Dead-Band Falling-Edge-Delay (PWM0DBFALL), offset 0x070 ............................. 542
PWM1 Dead-Band Falling-Edge-Delay (PWM1DBFALL), offset 0x0B0 ............................. 542
PWM2 Dead-Band Falling-Edge-Delay (PWM2DBFALL), offset 0x0F0 ............................. 542
Quadrature Encoder Interface (QEI) .......................................................................................... 543
Register 1: QEI Control (QEICTL), offset 0x000 ................................................................................ 548
Register 2: QEI Status (QEISTAT), offset 0x004 ................................................................................ 550
Register 3: QEI Position (QEIPOS), offset 0x008 .............................................................................. 551
Register 4: QEI Maximum Position (QEIMAXPOS), offset 0x00C ....................................................... 552
Register 5: QEI Timer Load (QEILOAD), offset 0x010 ....................................................................... 553
Register 6: QEI Timer (QEITIME), offset 0x014 ................................................................................. 554
Register 7: QEI Velocity Counter (QEICOUNT), offset 0x018 ............................................................. 555
Register 8: QEI Velocity (QEISPEED), offset 0x01C .......................................................................... 556
Register 9: QEI Interrupt Enable (QEIINTEN), offset 0x020 ............................................................... 557
Register 10: QEI Raw Interrupt Status (QEIRIS), offset 0x024 ............................................................. 558
Register 11: QEI Interrupt Status and Clear (QEIISC), offset 0x028 ..................................................... 559
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September 02, 2007
Preliminary