LM3S8962 Datasheet, PDF (512/620 Pages) List of Unclassifed Manufacturers – Microcontroller

Pulse Width Modulator (PWM)
■ Write the PWM0GENB register with a value of 0x0000.080C.
6. Set the period. For a 25-KHz frequency, the period = 1/25,000, or 40 microseconds. The PWM
clock source is 10 MHz; the system clock divided by 2. This translates to 400 clock ticks per
period. Use this value to set the PWM0LOAD register. In Count-Down mode, set the Load field
in the PWM0LOAD register to the requested period minus one.
■ Write the PWM0LOAD register with a value of 0x0000.018F.
7. Set the pulse width of the PWM0 pin for a 25% duty cycle.
■ Write the PWM0CMPA register with a value of 0x0000.012B.
8. Set the pulse width of the PWM1 pin for a 75% duty cycle.
■ Write the PWM0CMPB register with a value of 0x0000.0063.
9. Start the timers in PWM generator 0.
■ Write the PWM0CTL register with a value of 0x0000.0001.
10. Enable PWM outputs.
■ Write the PWMENABLE register with a value of 0x0000.0003.
19.4
Register Map
Table 19-1 on page 512 lists the PWM registers. The offset listed is a hexadecimal increment to the
register’s address, relative to the PWM base address of 0x4002.8000.
Table 19-1. PWM Register Map
Offset Name
Type
0x000 PWMCTL
0x004 PWMSYNC
0x008 PWMENABLE
0x00C PWMINVERT
0x010 PWMFAULT
0x014 PWMINTEN
0x018 PWMRIS
0x01C PWMISC
0x020 PWMSTATUS
0x040 PWM0CTL
0x044 PWM0INTEN
0x048 PWM0RIS
0x04C PWM0ISC
R/W
R/W
R/W
R/W
R/W
R/W
RO
R/W1C
RO
R/W
R/W
RO
R/W1C
Reset
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
Description
PWM Master Control
PWM Time Base Sync
PWM Output Enable
PWM Output Inversion
PWM Output Fault
PWM Interrupt Enable
PWM Raw Interrupt Status
PWM Interrupt Status and Clear
PWM Status
PWM0 Control
PWM0 Interrupt and Trigger Enable
PWM0 Raw Interrupt Status
PWM0 Interrupt Status and Clear
See
page
515
516
517
518
519
520
521
522
523
524
526
528
529
512
September 02, 2007
Preliminary