LM3S8962 Datasheet, PDF (18/620 Pages) List of Unclassifed Manufacturers – Microcontroller

Table of Contents
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Register 21:
Register 22:
Register 23:
Register 24:
Register 25:
Register 26:
Register 27:
Register 28:
Register 29:
Register 30:
Register 31:
Register 32:
Register 33:
Register 34:
Register 35:
Register 36:
Register 37:
CAN IF1 Command Request (CANIF1CRQ), offset 0x020 ................................................ 436
CAN IF2 Command Request (CANIF2CRQ), offset 0x080 ................................................ 436
CAN IF1 Command Mask (CANIF1CMSK), offset 0x024 .................................................. 437
CAN IF2 Command Mask (CANIF2CMSK), offset 0x084 .................................................. 437
CAN IF1 Mask 1 (CANIF1MSK1), offset 0x028 ................................................................ 440
CAN IF2 Mask 1 (CANIF2MSK1), offset 0x088 ................................................................ 440
CAN IF1 Mask 2 (CANIF1MSK2), offset 0x02C ................................................................ 441
CAN IF2 Mask 2 (CANIF2MSK2), offset 0x08C ................................................................ 441
CAN IF1 Arbitration 1 (CANIF1ARB1), offset 0x030 ......................................................... 442
CAN IF2 Arbitration 1 (CANIF2ARB1), offset 0x090 ......................................................... 442
CAN IF1 Arbitration 2 (CANIF1ARB2), offset 0x034 ......................................................... 443
CAN IF2 Arbitration 2 (CANIF2ARB2), offset 0x094 ......................................................... 443
CAN IF1 Message Control (CANIF1MCTL), offset 0x038 .................................................. 444
CAN IF2 Message Control (CANIF2MCTL), offset 0x098 .................................................. 444
CAN IF1 Data A1 (CANIF1DA1), offset 0x03C ................................................................. 446
CAN IF1 Data A2 (CANIF1DA2), offset 0x040 ................................................................. 446
CAN IF1 Data B1 (CANIF1DB1), offset 0x044 ................................................................. 446
CAN IF1 Data B2 (CANIF1DB2), offset 0x048 ................................................................. 446
CAN IF2 Data A1 (CANIF2DA1), offset 0x09C ................................................................. 446
CAN IF2 Data A2 (CANIF2DA2), offset 0x0A0 ................................................................. 446
CAN IF2 Data B1 (CANIF2DB1), offset 0x0A4 ................................................................. 446
CAN IF2 Data B2 (CANIF2DB2), offset 0x0A8 ................................................................. 446
CAN Transmission Request 1 (CANTXRQ1), offset 0x100 ................................................ 447
CAN Transmission Request 2 (CANTXRQ2), offset 0x104 ................................................ 447
CAN New Data 1 (CANNWDA1), offset 0x120 ................................................................. 448
CAN New Data 2 (CANNWDA2), offset 0x124 ................................................................. 448
CAN Message 1 Interrupt Pending (CANMSG1INT), offset 0x140 ..................................... 449
CAN Message 2 Interrupt Pending (CANMSG2INT), offset 0x144 ..................................... 449
CAN Message 1 Valid (CANMSG1VAL), offset 0x160 ....................................................... 450
CAN Message 2 Valid (CANMSG2VAL), offset 0x164 ....................................................... 450
Ethernet Controller ...................................................................................................................... 451
Register 1: Ethernet MAC Raw Interrupt Status (MACRIS), offset 0x000 ............................................ 460
Register 2: Ethernet MAC Interrupt Acknowledge (MACIACK), offset 0x000 ....................................... 462
Register 3: Ethernet MAC Interrupt Mask (MACIM), offset 0x004 ....................................................... 463
Register 4: Ethernet MAC Receive Control (MACRCTL), offset 0x008 ................................................ 464
Register 5: Ethernet MAC Transmit Control (MACTCTL), offset 0x00C ............................................... 465
Register 6: Ethernet MAC Data (MACDATA), offset 0x010 ................................................................. 466
Register 7: Ethernet MAC Individual Address 0 (MACIA0), offset 0x014 ............................................. 468
Register 8: Ethernet MAC Individual Address 1 (MACIA1), offset 0x018 ............................................. 469
Register 9: Ethernet MAC Threshold (MACTHR), offset 0x01C .......................................................... 470
Register 10: Ethernet MAC Management Control (MACMCTL), offset 0x020 ........................................ 471
Register 11: Ethernet MAC Management Divider (MACMDV), offset 0x024 .......................................... 472
Register 12: Ethernet MAC Management Transmit Data (MACMTXD), offset 0x02C ............................. 473
Register 13: Ethernet MAC Management Receive Data (MACMRXD), offset 0x030 .............................. 474
Register 14: Ethernet MAC Number of Packets (MACNP), offset 0x034 ............................................... 475
Register 15: Ethernet MAC Transmission Request (MACTR), offset 0x038 ........................................... 476
Register 16: Ethernet MAC Timer Support (MACTS), offset 0x03C ...................................................... 477
Register 17: Ethernet PHY Management Register 0 – Control (MR0), address 0x00 ............................. 478
18
September 02, 2007
Preliminary