M14D5121632A-2K Datasheet, PDF (9/64 Pages) Elite Semiconductor Memory Technology Inc. – Internal pipelined double-data-rate architecture; two data access per clock cycle

ESMT
M14D5121632A (2K)
AC Overshoot / Undershoot Specification
Parameter
Pin
Value
Unit
-1.3 / 1.5 / 1.8
-2.5
Maximum peak amplitude allowed for
overshoot
Address, CKE, CS , RAS , CAS , WE ,
ODT, CLK, CLK , DQ, DQS, DQS , DM
0.5
0.5
V
Maximum peak amplitude allowed for
undershoot
Address, CKE, CS , RAS , CAS , WE ,
ODT, CLK, CLK , DQ, DQS, DQS , DM
0.5
0.5
V
Address, CKE, CS , RAS , CAS , WE ,
0.5
Maximum overshoot area above V_DD
ODT,
CLK, CLK , DQ, DQS, DQS , DM
0.19
0.66
V-ns
0.23
V-ns
Address, CKE, CS , RAS , CAS , WE ,
0.5
Maximum undershoot area below V_SS
ODT,
CLK, CLK , DQ, DQS, DQS , DM
0.19
0.66
V-ns
0.23
V-ns
Elite Semiconductor Memory Technology Inc.
Publication Date : May 2014
Revision : 1.4
9/64