M14D5121632A-2K Datasheet, PDF(2/64 Page) Elite Semiconductor Memory Technology Inc. – Internal pipelined double-data-rate architecture; two data access per clock cycle

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M14D5121632A-2K Datasheet, PDF (2/64 Pages) Elite Semiconductor Memory Technology Inc. – Internal pipelined double-data-rate architecture; two data access per clock cycle

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ESMT

M14D5121632A (2K)

Ordering Information:

Product ID

Max Freq.

VDD

Data Rate

(CL-tRCD-tRP)

M14D5121632A -1.3BG2K *

750MHz

1.8V

DDR2-1500 (7-10-10)

M14D5121632A -1.5BG2K

667MHz

1.8V

DDR2-1333 (7-9-9)

M14D5121632A -1.8BG2K

M14D5121632A -2.5BG2K

533MHz

400MHz

1.8V

DDR2-1066 (7-7-7)

DDR2-800 (5-5-5)

M14D5121632A -1.8BBG2K

533MHz

1.8V

DDR2-1066 (7-7-7)

M14D5121632A -2.5BBG2K

400MHz

1.8V

DDR2-800 (5-5-5)

Note: * All specification for speed grade -1.3 is preliminary data.

Package

Comments

84 ball BGA

A(max) = 1.2mm

84 ball BGA

A(max) = 1.0mm

Pb-free

Functional Block Diagram

CLK

CKE

Clock

Generator

Address

Mode Register &

Extended Mode

Row

Address

Buffer

Refresh

Counter

RAS

CAS

Column

Address

Buffer

Refresh

Counter

Bank D

Bank C

Bank B

Bank A

Sense Amplifier

Column Decoder

Data Control Circuit

DQS, DQS

CLK, CLK

DLL

ODT

Elite Semiconductor Memory Technology Inc.

Publication Date : May 2014

Revision : 1.4

2/64

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