M14D128168A-2M Datasheet, PDF (54/59 Pages) Elite Semiconductor Memory Technology Inc. – Internal pipelined double-data-rate architecture; two data access per clock cycle

ESMT
Simplified States Diagram
M14D128168A (2M)
CKEL = CKE LOW
CKEH = CKE HIGH
ACT = Activate
WR(A) = Write (with Auto Precharge)
RD(A) = Read (with Auto Precharge)
PR(A) = Precharge (All)
(E)MRS = (Extended) Mode Register Set
SRF = Enter Self Refresh
REF = Auto Refresh
Elite Semiconductor Memory Technology Inc.
Publication Date : Mar. 2013
Revision : 1.4
54/59