S1L60000 Datasheet, PDF (48/230 Pages) Epson Company – GATE ARRAY

Chapter 4: Input/Out Cells Buffers and Their Use
Function
Normal output
Table 4-3 Output Buffers
I_OL*/I_OH**
0.1 mA/-0.1 mA
1 mA/-1 mA
3 mA/-3 mA
6 mA/-6 mA
9 mA/-9 mA
18 mA/-18 mA
(V_DD = 2.5 V)
Cell Name***
OBST
OBMT
OB1T
OB2T
OB3T
OB4T
Normal output for high speed
9 mA/-9 mA
18 mA/-18 mA
OB3AT
OB4AT
Normal output for low noise
9 mA/-9 mA
18 mA/-18 mA
OB3BT
OB4BT
3-state output
0.1 mA/-0.1 mA
1 mA/-1 mA
3 mA/-3 mA
6 mA/-6 mA
9 mA/-9 mA
18 mA/-18 mA
TBST
TBMT
TB1T
TB2T
TB3T
TB4T
3-state output for high speed
9 mA/-9 mA
18 mA/-18 mA
TB3AT
TB4AT
3-state output for low noise
9 mA/-9 mA
18 mA/-18 mA
TB3BT
TB4BT
3-state output (Bus hold circuit)
1 mA/-1 mA
3 mA/-3 mA
6 mA/-6 mA
9 mA/-9 mA
18 mA/-18 mA
TBMHT
TB1HT
TB2HT
TB3HT
TB4HT
3-state output for high speed (Bus hold circuit)
9 mA/-9 mA
18 mA/-18 mA
TB3AHT
TB4AHT
3-state output for low noise (Bus hold circuit)
9 mA/-9 mA
18 mA/-18 mA
TB3BHT
TB4BHT
NOTES: * V_OL = 0.4 V (V_DD = 2.5 V)
** V_OH = V_DD - 0.4 V (V_DD = 2.5 V)
*** In addition to the configurations in Table 4-3, the output buffers may be configured which do not have
test pins. Customers desiring to use such structures should direct inquiries to EPSON.
GATE ARRAY S1L60000 SERIES
EPSON
41
DESIGN GUIDE