S1L60000 Datasheet, PDF (146/230 Pages) Epson Company – GATE ARRAY

Chapter 10: Pin Layout Considerations
(5) Pull-up/Pull-down Resistor Inputs
The pull-up and pull-down resistance values are relatively large, ranging from a few dozen
to a few hundred kohms. The structure of the resistors depends on the power supply
voltage. Because of this, the pins are especially vulnerable to noise coming from the
power supply. The following cautions should be carefully considered when creating the pin
layout in order to prevent this noise from causing malfunctions.
a) Locate as far as possible from high-speed inputs (such as clock pins). (See Figure 10-
5.)
b) Locate away from output pins (especially large-current output pins). (See Figure
10-6.)
Please consider the following points prior to pin layout.
• Perform pull-up and pull-down processes on the PCB itself whenever possible.
• Select resistors with low resistances whenever possible.
CLK
PULL UP
Figure 10-5 Example 1 of Placement of Pull-up and Pull-down Resistors
PULL DOWN
High drive output
Figure 10-6 Example 2 of Placement of Pull-up and Pull-down Resistors
GATE ARRAY S1L60000 SERIES
DESIGN GUIDE
EPSON
139