S1L60000 Datasheet, PDF (102/230 Pages) Epson Company – GATE ARRAY

Chapter 5: RAM
5.10 RAM Symbols and How They Are Used
All simulation models have not been prepared in the RAM logic library using performance
characteristics indicative of the RAM word/bit configuration. Therefore, when using the RAM
logic library, apply the following methods:
(1) Select a cell (model) from Tables 5-1 and 5-2 depending on the needed word/bit size.
(2) Allocate the selected cell to the circuit and tie any unused input pins to the Low side. Do
not connect the unused output pins to anything.
For example, when using 1 port RAM of 16 words multiplied by 8 bits, select the cell (model) of
RAM1P1 from table 5-1. Tie its unused input pins to the Low side as Figure 5-8 and configure
the circuit according to the required RAM size.
Application
Circuit
D0 A A A A A
Y0
D1 0 1 2 3 4
Y1
D2
Y2
D3
Y3
D4
Y4
D5
Y5
D6
Y6
D7
D8
RAM1P1
Y7
Y8
RC
D15
WS
Y15
Application
Circuit
Figure 5-8 Example of the Use of RAM Logic Library (RAM1P1: 16 words × 8 Bits)
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