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S1L60000 Datasheet, PDF (130/230 Pages) Epson Company – GATE ARRAY
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Chapter 8: Test Pattern Generation
The input current tests are further broken down into the following classifications.
(1) Input Leakage Current Test (IIH. IIL)
Measurements are performed regarding the input current of the input buffers which
have no pull-up/pull-down resistors.
The current which flows when an High level voltage is applied to the input buffer is
called IIH, and its maximum current value is guaranteed. In order to perform this test
there must be an event in the test pattern which causes the input terminal to be
measured to have an High level input. Bi-directional terminals must have High level
inputs in the input state.
The current which flows when a Low level voltage is applied to the input buffer is called
IIL, and its maximum value is guaranteed. In order to perform this test there must be
an event in the test pattern which causes the input terminal to be measured to have a
Low level input. Bi-directional terminals must have Low level inputs in the input state.
(2) Pull-up Current Tests (IPU)
This test measures the current which flows when an Low level voltage is applied to an
input buffer having a pull-up resistor. In order to perform this test there must be an
event in the test pattern which causes the input terminal to be measured to have an
Low level input. Bi-directional terminals must have Low level inputs in the input state.
(3) Pull-down Current Tests (IPD)
This test measures the current which flows when an High level voltage is applied to an
input buffer having a pull-down resistor. In order to perform this test there must be an
event in the test pattern which causes the input terminal to be measured to have an
High level input. Bi-directional terminals must have High level inputs in the input state.
(4) Off State Leakage Current (Ioz)
This measures the leakage current which flows when the output is a high-impedance
state in output buffers which have open drains or which are 3-state output buffers. The
actual measurement is the measurement of the currents when a VDD level voltage is
applied, and when a VSS level voltage is applied to the terminal being measured when
the terminal is in a high-impedance state. Because of this, the terminal being
measured must enter into a high impedance state in the test pattern.
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