S1X70000 Datasheet, PDF (368/379 Pages) Epson Company – STANDARD CELL / EMBEDDED ARRAY

Chapter 8 Circuit Design that Takes Testability into Account
d. Regarding hierarchical blocks
Make sure the hierarchical blocks in the netlist are configured as shown below. Note
that, following boundary scan insertion, hierarchical blocks such as a TAP controller
are added.
• Place I/O cells in the top block.
• Place other logic cells in a sub-block one layer below that as much as possible.
Figure 8-23 Image of a Hierarchical Block Configuration
e. Regarding I/O-cell types
If the design includes one of the following types of I/O cells, the boundary scan service
cannot be used:
• I/O cells with test mode
• Gated input cells
• Open-drain output cells
• I/O cells with pull-up/pull-down registor
f. External pins handling analog signals
Boundary scan cells are not inserted for oscillation-circuit input/output pins or
external pins that handle analog signals.
g. Multibonding and multipads
If the design includes multibonding or multipads, the boundary scan service cannot be
used.
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