S1X70000 Datasheet, PDF (194/379 Pages) Epson Company – STANDARD CELL / EMBEDDED ARRAY

Chapter 6 Estimating Various Characteristic Values
6.1.2 Input Buffers (P_i)
The power consumption of input buffers is obtained as the sum total of the frequencies of
the input signals supplied to the respective buffers, f [MHz], multiplied by Kpi [µW/MHz].
P_i =
K
∑
(Kpi x fi)
[µW]
i =1
where, fi : operating frequency [MHz]
Kpi : voltage coefficient of the input buffer (see Table 6-2)
Table 6-2 Kpi for Input Cells in the S1K70000 Series
V_DD (Typ.)
HV_DD = 3.3 V
HV_DD = 2.5 V
V_DD or LV_DD = 1.8 V
V_DD or LV_DD = 1.5 V
3.3-V Buffers (Y Type)
2.57
1.16
0.62
0.43
2.5-V Buffers (X Type)
—
1.57
0.68
0.45
Unit
µW/MHz
6.1.3 Output Buffers (P_o)
The power consumption of output buffers differs between DC load (e.g., resistive load or
when connected to TTL devices) and AC load (e.g., capacitive load or when connected to
CMOS devices).
If the DC power consumption and AC power consumption are assumed to be PDC and PAC,
respectively, then the power consumption of the output buffers to be obtained, P_o, is
expressed by the equation below.
P_o = PAC + PDC
6.1.3.1 AC Power Consumption (PAC)
With an AC load, the power consumption of the output buffers can be roughly calculated
using the equation below.
PAC =
K
∑
{fi x C_L x (V_DD) ²}
i =1
where, fi : operating frequency of the output buffer [Hz]
C_L : output load capacitance [F]
V_DD : power-supply voltage [V]
6.1.3.2 DC Power Consumption (PDC)
With a DC load, the power consumption of the output buffers can be roughly calculated
using the equation below.
P_DC = P_DCH + P_DCL
where, P_DCH = |I_OH| x (V_DD*-V_OH)
P_DCL = I_OL x V_OL
Here, the ratio of PDCH to PDCL is determined by the duty cycle of the output signal.
186
EPSON
STANDARD CELL S1K70000 SERIES
EMBEDDED ARRAY S1X70000 SERIES