S1X70000 Datasheet, PDF (333/379 Pages) Epson Company – STANDARD CELL / EMBEDDED ARRAY

Chapter 8 Circuit Design that Takes Testability into Account
(7) Other
The S1K70000 series uses active pull-up/pull-down resistors. When the test circuit
“L1TCIR2” is used in a customer’s circuit, the pull-up/pull-down resistors are forcibly
disabled in quiescent-current measurement mode. In such a case, the properties of
the customer’s pull-up/pull-down-resistor control pin “PC” are ignored. If control of
the pull-up/pull-down resistors is unnecessary, the PC pin must be fixed to the Low
level. In that case as well, the pull-up/pull-down resistors are disabled while in test
mode.
8.3.2 Circuit Configuration When Output Buffers without a Test Circuit
are Used
If, due to the configuration of the customer’s circuit design, output buffers with a test
function or the Epson-recommended test circuit “L1TCIR2” cannot be used, the operating
speed of the customer’s circuit will be guaranteed by measuring the critical paths it
contains. In that case, customers will be requested to generate a test pattern that is
capable of measuring the customer’s critical paths.
If critical paths in the customer’s circuit are not particularly specified, a delay
measurement device “L1ACP1” and a selector circuit that selects between the customer’s
circuit and the “L1ACP1” will be inserted by Epson. In addition, by measuring the
dedicated AC path in this configuration, variations between lots will be evaluated and the
operating speed guaranteed. In such a case, customers will be requested to select two
input pins and one output pin from the customer’s circuit. Because the delay
measurement device “L1ACP1” does this by judging the difference in measured values
between the tested device’s delay and the bypass delay, it is always possible to achieve
consistent delay measurement not dependent on the intra-chip location of the test circuit
or measurement conditions external to the chip.
STANDARD CELL S1K70000 SERIES
EMBEDDED ARRAY S1X70000 SERIES
EPSON
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