DS80C390 Datasheet, PDF (5/58 Pages) Dallas Semiconductor – Dual CAN High-Speed Microprocessor

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P1.0-P1.7
A0
A1
A2
A3
A4
A5
A6
A7
A8 (P2.0)
A9 (P2.1)
A10 (P2.2)
A11 (P2.3)
A12 (P2.4)
A13 (P2.5)
A14 (P2.6)
A15 (P2.7)
P3.0-P3.7
DS80C390
Port 1 - I/O. Port 1 can function as an 8-bit bi-directional I/O port,
the non-multiplexed A0 - A7 signals (when the MUX pin =1), and
as an alternate interface for internal resources. Setting the SP1EC
bit relocates RXD1 and TXD1 to Port 5. The reset condition of Port
1 is all bits at logic 1 via a weak pullup. The logic 1 state also
serves as an input mode, since external circuits writing to the port
can overdrive the weak pullup. When software clears any port pin
to 0, a strong pulldown is activated that remains on until either a 1
is written to the port pin or a reset occurs. Writing a 1 after the port
has been at 0 will activate a strong transition driver, followed by a
weaker sustaining pullup. Once the momentary strong driver turns
off, the port once again becomes the output (and input) high state.
Port Alternate Function
P1.0 T2 External I/O for Timer/Counter 2
P1.1 T2EX Timer/Counter 2 Capture/Reload Trigger
P1.2 RXD1 Serial Port 1 Input
P1.3 TXD1 Serial Port 1 Output
P1.4 INT2 External Interrupt 2 (Pos. Edge Detect)
P1.5 INT3 External Interrupt 3 (Neg. Edge Detect)
P1.6 INT4 External Interrupt 4 (Pos. Edge Detect)
P1.7 INT5 External Interrupt 5 (Neg. Edge Detect)
A15-A8 (Port 2) - Output. Port 2 serves as the MSB for external
addressing. The port automatically asserts the address MSB during
external ROM and RAM access. Although the Port 2 SFR exists,
the SFR value will never appear on the pins (due to memory
access). Therefore accessing the Port 2 SFR is only useful for
MOVX A, @Ri or MOVX @Ri, A instructions, which use the Port
2 SFR as the external address MSB.
Port 3 - I/O. Port 3 functions as an 8-bit bi-directional I/O port,
and as an alternate interface for several resources found on the
traditional 8051. The reset condition of Port 1 is all bits at logic 1
via a weak pullup. The logic 1 state also serves as an input mode,
since external circuits writing to the port can overdrive the weak
pullup. When software clears any port pin to 0, the device activates
a strong pulldown that remains on until either a 1 is written to the
port pin or a reset occurs. Writing a 1 after the port has been at 0
will activate a strong transition driver, followed by a weaker
sustaining pullup. Once the momentary strong driver turns off, the
port once again becomes the output (and input) high state.
Port Alternate Function
P3.0 RXD0 Serial Port 0 Input
P3.1 TXD0 Serial Port 0 Output
P3.2 INT0 External Interrupt 0
P3.3 INT1 External Interrupt 1
P3.4 T0 Timer 0 External Input
P3.5 T1/XCLK Timer 1 External Input/External Clock Output
P3.6 WR External Data Memory Write Strobe
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