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DS80C390 Datasheet, PDF (36/58 Pages) Dallas Semiconductor – Dual CAN High-Speed Microprocessor
Port 0 Address, Port 4 CE, tAVDV1
0.75 tMCS -20
ns
Port 5 PCE to Valid Data In
(CST+0.375)•tMCS -20
(CST+1.375)•tMCS -20
Port 2, 4 Address to Valid
tAVDV2
0.875 tMCS -20
ns
Data In
(CST+0.5)•tMCS -20
(CST+1.5)•tMCS -20
ALE Low to RD or WR
tLLWL 0.125 tMCS -5 0.125 tMCS +5
ns
Low
0.25tMCS -5
0.25tMCS +5
1.25 tMCS -10 1.25 tMCS +10
Port 0 Address, Port 4 CE, tAVWL1 0.25 tMCS -5
ns
Port 5 PCE to RD or WR
0.5tMCS -5
Low
2.5 tMCS -10
Port 2, 4 Address to or WR tAVWL2 0.375 tMCS -5
ns
Low
0.625tMCS -5
2.625 tMCS -10
Data Valid to WR
tQVWX
-5
ns
Transition
Data hold after WR high
tWHQX 0.25 tMCS -5
ns
0.5tMCS -5
1.5 tMCS -10
RD Low to Address Float
tRLAZ
-(0.125 tMCS -5)
ns
RD or WR High to ALE,
tWHLH
0
10
ns
Port 4 CE or Port 5 PCE
0.25 tMCS -5
0.25 tMCS +5
High
1.25 tMCS -10 1.25 tMCS +10
DS80C390
CST = 0
1≤ CST ≤ 3
4 ≤ CST ≤ 7
CST = 0
1≤ CST ≤ 3
4 ≤ CST ≤ 7
CST =0
1 ≤ CST ≤ 3
4 ≤ CST ≤ 7
CST = 0
1 ≤ CST ≤ 3
4 ≤ CST ≤ 7
CST = 0
1 ≤ CST ≤ 3
4 ≤ CST ≤ 7
CST = 0
1 ≤ CST ≤ 3
4 ≤ CST ≤ 7
0≤ CST ≤ 7
CST = 0
1 ≤ CST ≤ 3
4 ≤ CST ≤ 7
NOTES FOR MOVX CHARACTERISTICS:
1. All parameters apply to both commercial and industrial temperature operation unless otherwise noted.
2. CST is the stretch cycle value as determined by the MD2, MD1, & MD0 bits of the CKCON register.
tMCS is a time period determined by the stretch cycle value, shown in the following table.
tMCS TIME PERIODS
System Clock Selection
4X/ 2X
CD1
CD0
1
0
0
0
0
0
X
1
0
X
1
1
tMCS
1 tCLCL
2 tCLCL
4 tCLCL
1024 tCLCL
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